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Support PEM that is not a PCI endpoint on ThunderX
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Authored by zbb on Feb 15 2016, 10:23 AM.
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Details

Summary

Some chip revisions don't have their external PCIe
buses behind the internal bridge. Add support for FDT-configurable
PEMs but keep ability for PCIe enumeration.

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rS FreeBSD src repository - subversion
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zbb retitled this revision from to Support PEM that is not a PCI endpoint on ThunderX.
zbb updated this object.
zbb edited the test plan for this revision. (Show Details)
zbb added reviewers: wma, andrew.
zbb set the repository for this revision to rS FreeBSD src repository - subversion.
zbb added a subscriber: arm64.

Don't use ranges provided by the FDT (always use formula).

In D5285#112687, @zbb wrote:

Don't use ranges provided by the FDT (always use formula).

Why?

sys/arm64/cavium/thunder_pcie_pem.c
52–53 ↗(On Diff #13316)

These should be #include <arm64/cavium/...>

513–514 ↗(On Diff #13316)

Where is this called from? i.e. why is it no longer static.

sys/arm64/cavium/thunder_pcie_pem.h
32 ↗(On Diff #13316)

No tab after #ifndef, only #define.

sys/arm64/cavium/thunder_pcie_pem_fdt.c
28 ↗(On Diff #13316)

Why is this needed? I don't see where FDT is used.

sys/arm64/cavium/thunder_pcie_pem.c
52–53 ↗(On Diff #13316)

Why?

513–514 ↗(On Diff #13316)

I forgot to revert this. Thanks.

sys/arm64/cavium/thunder_pcie_pem_fdt.c
28 ↗(On Diff #13316)

OK

sys/arm64/cavium/thunder_pcie_pem.c
52–53 ↗(On Diff #13316)

#include "..." is generally used for generated headers, e.g. opt_*.h or '*_if.h`

wma edited edge metadata.

Andrew, the DTS provided by Cavium is not yet an official one and some of its entries are not working (it's the case here, with PEM ranges). ThunderX specification clearly states where the appropriate PCIe windows are located inside PA address space, so we want to leave calculation as the only option, because it's working both when PEM is an internal PCIe device and if it is attached to simplebus via fdt. We can rethink this approach once the final DTS is released by Cavium.

Zbb, please fix all above nits and commit whenever you're ready.

This revision is now accepted and ready to land.Feb 16 2016, 6:32 AM
zbb edited edge metadata.
This revision now requires review to proceed.Feb 16 2016, 11:11 AM
zbb marked 6 inline comments as done.Feb 16 2016, 11:12 AM
In D5285#112848, @wma wrote:

Andrew, the DTS provided by Cavium is not yet an official one and some of its entries are not working (it's the case here, with PEM ranges). ThunderX specification clearly states where the appropriate PCIe windows are located inside PA address space, so we want to leave calculation as the only option, because it's working both when PEM is an internal PCIe device and if it is attached to simplebus via fdt. We can rethink this approach once the final DTS is released by Cavium.

Then this should be added as a comment to help the maintainability of the code. There is already too much code in the tree where someone will hack something together to work on one platform. This can make it difficult to know what bits are needed when later working on the code.

You should also consider that not everyone who may look at this code will have access to the NDA documentation. As such you may need to explain why things are being done in certain ways. It may refer back to said documentation, but shouldn't rely on it to get the general point across.

zbb edited edge metadata.
sys/arm64/cavium/thunder_pcie_pem.c
584 ↗(On Diff #13360)

according :p

wma edited edge metadata.

Otherwise looks good.

This revision is now accepted and ready to land.Feb 16 2016, 11:37 AM
andrew edited edge metadata.
This revision was automatically updated to reflect the committed changes.