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sfxge: use correct register definitions for setting interrupt moderation on Medford
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Authored by arybchik on Jan 13 2016, 7:39 AM.
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Details

Summary

The only value which has changed is the number of rows
(ER_DZ_EVQ_TMR_REG_ROWS is 2048 vs 1024 for FR_BZ_TIMER_COMMAND_REGP0_ROWS)
but that isn't used, so this shouldn't change behaviour.

Submitted by: Mark Spender <mspender at solarflare.com>
Sponsored by: Solarflare Communications, Inc.
MFC after: 2 days

Test Plan

Build tested. Driver loaded/unloaded.

Diff Detail

Repository
rS FreeBSD src repository - subversion
Lint
No Lint Coverage
Unit
No Test Coverage
Build Status
Buildable 2097
Build 2105: arc lint + arc unit

Event Timeline

arybchik retitled this revision from to sfxge: use correct register definitions for setting interrupt moderation on Medford.
arybchik updated this object.
arybchik edited the test plan for this revision. (Show Details)
arybchik added reviewers: gnn, philip, np, bz.
gnn edited edge metadata.
This revision is now accepted and ready to land.Jan 13 2016, 4:05 PM
This revision was automatically updated to reflect the committed changes.