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Pine Quartz64 clock driver
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Authored by sos on Jul 24 2021, 5:43 PM.

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Reviewers
manu
mmel
Group Reviewers
arm64
Summary

Driver for the cru and pmucru devices in the rk356[68] SOC used in the Pine Quartz64 A/B.
Patch against stable13 but should be useable for -current as well

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sos created this object with edit policy "sos (Søren Schmidt)".
sos requested review of this revision.Jul 24 2021, 5:43 PM
sos changed the edit policy from "sos (Søren Schmidt)" to "All Users".Jul 26 2021, 9:34 PM
sys/arm64/rockchip/clk/rk_clk_fract.c
194

So for which clock this hack is needed ?

The following clocks:
clk_i2s0_8ch_tx_frac: rk_clk_fract_recalc denominator is zero!
clk_i2s0_8ch_rx_frac: rk_clk_fract_recalc denominator is zero!
clk_i2s1_8ch_tx_frac: rk_clk_fract_recalc denominator is zero!
clk_i2s1_8ch_rx_frac: rk_clk_fract_recalc denominator is zero!
clk_i2s2_2ch_frac: rk_clk_fract_recalc denominator is zero!
clk_i2s3_2ch_tx_frac: rk_clk_fract_recalc denominator is zero!
clk_i2s3_2ch_rx_frac: rk_clk_fract_recalc denominator is zero!
mclk_spdif_8ch_frac: rk_clk_fract_recalc denominator is zero!
sclk_audpwm_frac: rk_clk_fract_recalc denominator is zero!
clk_uart1_frac: rk_clk_fract_recalc denominator is zero!
clk_uart2_frac: rk_clk_fract_recalc denominator is zero!
clk_uart3_frac: rk_clk_fract_recalc denominator is zero!
clk_uart4_frac: rk_clk_fract_recalc denominator is zero!
clk_uart5_frac: rk_clk_fract_recalc denominator is zero!
clk_uart6_frac: rk_clk_fract_recalc denominator is zero!
clk_uart7_frac: rk_clk_fract_recalc denominator is zero!
clk_uart8_frac: rk_clk_fract_recalc denominator is zero!
clk_uart9_frac: rk_clk_fract_recalc denominator is zero!
sclk_uart0_frac: rk_clk_fract_recalc denominator is zero!

In D31299#705744, @sos wrote:

The following clocks:
clk_i2s0_8ch_tx_frac: rk_clk_fract_recalc denominator is zero!
clk_i2s0_8ch_rx_frac: rk_clk_fract_recalc denominator is zero!
clk_i2s1_8ch_tx_frac: rk_clk_fract_recalc denominator is zero!
clk_i2s1_8ch_rx_frac: rk_clk_fract_recalc denominator is zero!
clk_i2s2_2ch_frac: rk_clk_fract_recalc denominator is zero!
clk_i2s3_2ch_tx_frac: rk_clk_fract_recalc denominator is zero!
clk_i2s3_2ch_rx_frac: rk_clk_fract_recalc denominator is zero!
mclk_spdif_8ch_frac: rk_clk_fract_recalc denominator is zero!
sclk_audpwm_frac: rk_clk_fract_recalc denominator is zero!
clk_uart1_frac: rk_clk_fract_recalc denominator is zero!
clk_uart2_frac: rk_clk_fract_recalc denominator is zero!
clk_uart3_frac: rk_clk_fract_recalc denominator is zero!
clk_uart4_frac: rk_clk_fract_recalc denominator is zero!
clk_uart5_frac: rk_clk_fract_recalc denominator is zero!
clk_uart6_frac: rk_clk_fract_recalc denominator is zero!
clk_uart7_frac: rk_clk_fract_recalc denominator is zero!
clk_uart8_frac: rk_clk_fract_recalc denominator is zero!
clk_uart9_frac: rk_clk_fract_recalc denominator is zero!
sclk_uart0_frac: rk_clk_fract_recalc denominator is zero!

Right ok, I see that all frac clock have a default denominator set to 0 in this SoC.
We can remove the printf but returning EINVAL is correct as the clocks aren't setup.

No you most certainly can not return EINVAL when it is zero :) it will panic the kernel: panic: clknode_refresh_cache failed for 'sclk_audpwm_frac
But returning 0 and a frequency of zero will make it "do the right thing" later when the clock comes available.
Have you tried it on your board ?

In D31299#707789, @sos wrote:

No you most certainly can not return EINVAL when it is zero :) it will panic the kernel: panic: clknode_refresh_cache failed for 'sclk_audpwm_frac
But returning 0 and a frequency of zero will make it "do the right thing" later when the clock comes available.
Have you tried it on your board ?

No I haven't tried yet.
I think that the best solution would be to init the denominator to 1 if it's 0 in the init phase.