[PowerPC] Fix booke64 qemu infinite loop in L2 cache enable

[bdragon]

Summary

Since qemu does not implement the L2 cache, we get stuck forever waiting for a bit to be set when trying to invalidate it.

To prevent that, we should bail out if the L2 cache is missing. One easy way to check this is L2CFG0 == 0 (since L2CSIZE always has at least one bit set in a valid implementation)

(tested on qemu, rb800, and x5000)

Test Plan

Boot on qemu e500 64 bit and hardware.

[jhibbits]

sys/powerpc/booke/machdep_e500.c

99–105

You could rework it so that instead of bailing early, only do the work if SPR_L2CFG0 != 0; that way you can print out the "L2 cache disabled" below in qemu as well. What do you think?

[bdragon]

Reword comment, switch to switching to the end of the function so the message gets printed out as per jhibbits' suggestion.

[jhibbits]

sys/powerpc/booke/machdep_e500.c

103–111

I would instead change the condition to be

if (mfspr(SPR_L2CFG0) != 0) {
  ...
}

instead of using the label. At the asm level it's virtually identical, but it reads cleaner in C.

[bdragon]

addressing comment by jhibbits