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Implement NMI window exiting on AMD/SVM processors.
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Authored by neel on Apr 23 2015, 2:40 AM.

Details

Reviewers
rgrimes
Group Reviewers
bhyve
Summary

AMD/SVM does not have hardware assist for NMI window exiting. The hypervisor
tracks the state of NMI blocking in two stages.

In the first stage the "iret" intercept is enabled. This causes a #VMEXIT
when the guest tries to execute an "iret" to return from the NMI handler.

In the second stage the "iret" intercept is cleared and the "iret" instruction
is single-stepped by the hypervisor by setting the 'Trap' and 'Resume' bits
in the %rflags register. Additionally the hypervisor also enables intercepts
for all exceptions.

If the "iret" executes successfully the #DB exception triggers a #VMEXIT.
In response to this the hypervisor unblocks NMIs, disables the exception
intercepts and resumes guest execution.

If the "iret" causes an exception (#GP, #PF etc) then it will trigger a
#VMEXIT. In response to this the hypervisor unblocks NMIs, disables the
exception intercepts and reflects the exception back into the guest.

The odd case is when the "iret" results in a hardware task switch and the
single-stepping described above does not work. In this case the NMI is
unblocked before the "iret" is executed by the vcpu.

Test Plan

Diff Detail

Repository
rS FreeBSD src repository
Lint
Lint OK
Unit
No Unit Test Coverage

Event Timeline

neel retitled this revision from to Implement NMI window exiting on AMD/SVM processors..Apr 23 2015, 2:40 AM
neel updated this object.
neel added a reviewer: grehan.
neel edited the test plan for this revision. (Show Details)
neel updated this revision to Diff 4960.
emaste added a subscriber: jhb.Nov 15 2018, 9:09 PM
rgrimes removed a reviewer: grehan.Feb 20 2019, 5:59 PM