readelf: Add RISC-V DWARF register aliases

[mhorne]

Summary

This allows DWARF debugging output to display the common register
mneumonics, such as ra, sp, or t0.

DWARF registers 0-31 are mapped to the 32 general purpose registers,
and are immediately followed by the 32 floating point registers.

Test Plan

Sample output from readelf -wf:

0000b138 0000002c 0000ac68 FDE cie=0000ac68 pc=000465fe..00046656
  DW_CFA_advance_loc: 6 to 00046604
  DW_CFA_def_cfa_offset: 32
  DW_CFA_advance_loc: 8 to 0004660c
  DW_CFA_offset: r8 (s0) at cfa-16
  DW_CFA_offset: r9 (s1) at cfa-24
  DW_CFA_offset: r18 (s2) at cfa-32
  DW_CFA_offset: r1 (ra) at cfa-8
  DW_CFA_advance_loc1: 60 to 00046648
  DW_CFA_restore: r1 (ra)
  DW_CFA_advance_loc: 2 to 0004664a
  DW_CFA_restore: r18 (s2)
  DW_CFA_advance_loc: 6 to 00046650
  DW_CFA_restore: r8 (s0)
  DW_CFA_advance_loc: 2 to 00046652
  DW_CFA_restore: r9 (s1)
  DW_CFA_advance_loc: 2 to 00046654
  DW_CFA_def_cfa_offset: 0

[markj]

Approved.