Axe MINIMUM_MSI_INT.

[jhb]

Summary

Just allow MSI interrupts to always start at the end of the I/O APIC
pins. Since existing machines already have more than 255 I/O APIC
pins, IRQ 255 is no longer reliably invalid, so just remove the
minimum starting value for MSI.

Test Plan

• boot an amd64 VM under bhyve
• I have not tested Xen.

[jhb]

It is perhaps debatable if we want this change since it will change the IRQ values users see (and users might be used to >= 256 meaning MSI), and I probably won't MFC it if we do decide we want it in HEAD for those reasons.

sys/x86/xen/pvcpu_enum.c

202

I believe this matches the intent of the comment.

[jhb]

Rebase.

[kib]

May be export the first_msi_irq as ro mib ?

[jhb]

• Add a read-only sysctl for first_msi_irq.