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Axe MINIMUM_MSI_INT.
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Authored by jhb on Nov 14 2018, 8:04 PM.
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Details

Summary

Just allow MSI interrupts to always start at the end of the I/O APIC
pins. Since existing machines already have more than 255 I/O APIC
pins, IRQ 255 is no longer reliably invalid, so just remove the
minimum starting value for MSI.

Test Plan
  • boot an amd64 VM under bhyve
  • I have not tested Xen.

Diff Detail

Repository
rS FreeBSD src repository - subversion
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jhb marked an inline comment as done.Nov 14 2018, 8:05 PM

It is perhaps debatable if we want this change since it will change the IRQ values users see (and users might be used to >= 256 meaning MSI), and I probably won't MFC it if we do decide we want it in HEAD for those reasons.

sys/x86/xen/pvcpu_enum.c
202 ↗(On Diff #50426)

I believe this matches the intent of the comment.

May be export the first_msi_irq as ro mib ?

  • Add a read-only sysctl for first_msi_irq.
This revision is now accepted and ready to land.Nov 16 2018, 7:39 PM
This revision was automatically updated to reflect the committed changes.