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acpica, pci_host_generic_acpi: redo pci_host_generic_acpi.c

Authored by jchandra on Nov 1 2018, 12:01 AM.
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This is a major update for pci_host_generic_acpi.c, the current implementation has quite a few gaps that is better fixed up in one go.
The changes are:

  • Follow x86 method of not adding PCI resources to PCI host bridge in ACPI code. This has been moved to pci_host_generic_acpi.c, where we walk thru its resources of the host bridge and add resources.
  • Fixup code in pci_host_generic_acpi.c to read all decoded ranges and update the 'ranges' property. This allows us to share most of the code with generic implementation (and the FDT one).
  • Parse and setup IO ranges and bus ranges when walking the resources above. Drop most of the changes related to this from acpica code.
  • Add the ECAM memory area as mem resource 0. Implement the logic to get the ECAM area from MCFG (using bus range which we now decode), or from _CBA (using _BBN/bus range). Drop aarch64 ifdefs from acpica code which did part of this.
  • Switch resource activation to similar code as FDT implementation, this can be moved into generic implementation in a later pass.
  • Drop the mechanism of using the 7th bit of bus number as the domain, this is not correct and will work only in very specific cases. Use _SEG as PCI domain and use the bus ranges of the host bridge to provide start bus number.

This commit should not make any functional change to sys/dev/acpica/acpi.c for other architectures, almost all the changes there are to revert earlier additions in this file done for aarch64.

Test Plan

Test PCI devices on Cavium ThunderX2 (single socket system since NUMA is not supported yet).
Test virtio PCI devices on qemu/kvm with kern.cfg.order=acpi for legacy interrupts
Test virtio PCI devices on qemu/kvm with kern.cfg.order=acpi and hw.pci.honor_msi_blacklist=0 for MSI/MSI-X

Diff Detail

rS FreeBSD src repository - subversion
Lint Not Applicable
Tests Not Applicable

Event Timeline

156 ↗(On Diff #49854)

The normal style is foo++

159 ↗(On Diff #49854)

Do we never get an address64 for IO?

236–237 ↗(On Diff #49854)

What was special about 0x100000?

jchandra added inline comments.
156 ↗(On Diff #49854)

ok - will fix up.

159 ↗(On Diff #49854)

Looks like there is a QWordIO in the ACPI spec - although I have not see it implemented. I can take care of that here.

236–237 ↗(On Diff #49854)

this is the 20 bit sift for the bus.

base + (sc->base.bus_start << PCIE_BUS_SHIFT)

is probably easier to read. Will fix.

Fixed issues noted by andrew.

andrew added inline comments.
434–435 ↗(On Diff #49963)

Did you intend to change this?

This revision is now accepted and ready to land.Nov 15 2018, 6:04 PM
This revision was automatically updated to reflect the committed changes.