The current implementation to write a fixed address to AHCI BARs is not
correct. The PCI address ranges are allocated by firmware and will
change depending on PCI devices present. Using a fixed value here is
not a viable option.
The newer firmware does not have this issue (and the older evaluation
Ax chips with SATA BAR issues are no longer in use), so it is better
to drop this quirk altogether, rather than to fix correctly.