This happens in two cases for a20 clocks:
pll_core for 'n' factor:
factor=0, val=1
factor=n, val=n
ahb divisor:
factor=0,val=/2
factor=n,val=/2^n
Differential D15806
aw_ccung: Support clock factors where factor=0, factor is effectively 1 kevans on Jun 14 2018, 3:34 PM. Authored by Tags None Referenced Files
Details This happens in two cases for a20 clocks: pll_core for 'n' factor: ahb divisor:
Diff Detail
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