ARM Coresight support

[br]

Summary

Support for ARM Coresight devices in a small Coresight framework

Limitations of hardware:

• Scatter-gather operation is broken in hardware on Qualcomm Snapdragon 410e processor (Dragonboard 410c).
• None of Coresight interconnect devices provides an interrupt line.
• Circular-buffer is the only mode of operation for TMC(ETR). So buffer will be overwritten from start and none of interrupt provided.
• Can't restore state of ETR(TMC) device: there is no way to set offset of buffer to continue operation from. So two users can't trace simultaneously

Example usage:

pmctrace -u coresight uname
pmctrace -u coresight -t uname
sudo pmctrace -s coresight -i kernel -f cpu_switch

Test Plan

Tested on Dragonboard 410c.

[andrew]

sys/arm64/coresight/coresight-cmd.c

61 ↗

(On Diff #40067)

if (out != NULL)

87 ↗

(On Diff #40067)

while (out != NULL)

sys/arm64/coresight/coresight-cpu-debug.c

102–104 ↗

(On Diff #40067)

This comment doesn't make sense. Why is device 0 for the current CPU in a SMP system?

109 ↗

(On Diff #40067)

Why wmb? Device memory is mapped to not be reordered and we should use bus_space_barrier to mark when we need a bus memory barrier.

sys/arm64/coresight/coresight-dynamic-replicator.c

79–83 ↗

(On Diff #40067)

What's the meaning of 0x00 and 0xff here?

97–98 ↗

(On Diff #40067)

Magic numbers

139 ↗

(On Diff #40067)

wmb?

sys/arm64/coresight/coresight-etm4x.c

104 ↗

(On Diff #40067)

TRCPRGCTLR_EN?

111 ↗

(On Diff #40067)

((bus_read_4(...) & TRCPRGCTLR_EN) == 0)

165 ↗

(On Diff #40067)

0xC?

168 ↗

(On Diff #40067)

More magic

sys/arm64/coresight/coresight-funnel.c

136 ↗

(On Diff #40067)

wmb?

sys/arm64/coresight/coresight-tmc.c

68 ↗

(On Diff #40067)

Why int? We only return 0 and never check it.

74 ↗

(On Diff #40067)

wmb

[br]

• Don't touch Coresight components on a driver attach. This may lead to reboot on Qualcomm and other platforms if clocks are not configured before the attach. Add coresight_init method.
• If CPU streams routed to a single TMC device ensure we do not overwrite TMC configuration. One TMC device can handle single hwpmc event only.
• Unmagic numbers

[br]

sys/arm64/coresight/coresight-cmd.c

61 ↗

(On Diff #40067)

Thanks

87 ↗

(On Diff #40067)

Thanks

sys/arm64/coresight/coresight-cpu-debug.c

102–104 ↗

(On Diff #40067)

You right. There is CPU xref in FDT.
I now register this device similar to other devices so we enable debug unit on a specific to event CPU only

109 ↗

(On Diff #40067)

Ok I removed wmb calls

sys/arm64/coresight/coresight-dynamic-replicator.c

79–83 ↗

(On Diff #40067)

I am looking for a Dynamic Replicator documentation currently (I don't have it. I took this magic from Linux.)

139 ↗

(On Diff #40067)

Thanks