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Fix PCIe window decoding on Armada 38x
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Authored by mw_semihalf.com on May 25 2017, 3:19 PM.
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F132890027: D10905.id29340.diff
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Details

Summary

Original PCIe nodes for Marvell SoCs consists of ports' nodes
under main controller node. In order to properly parse
this kind of representation in DT a mechanism for traversing
through the tree required an update. Moreover, processing FDT
data consisting of more than 2 cells had to be fixed,
because the 'reg' property of mrvl,pcie node have additional
parameter in front of 64-bit address. It should be skipped
by default. This commit works properly with old mrvl,pcie
representation for Kirkwood and ArmadaXP SoCs.

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rS FreeBSD src repository - subversion
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