Add MIPS_ALLOW_PAGE_ALIASING option.

[brooks]

Summary

Use this option to enable buffer cache improvements on hardware the supports it and to enable shared page support on that hardware.

Share page support currently has the sole effect of moving the signal trampoline to
the shared page. If MIPS had execute permissions on pages this would
allow the default stack to be R/W rather than R/W/X.

Obtained from: CheriBSD
Sponsored by: DARPA, AFRL

Test Plan

Needs testing on mips (32) and testing of COMPAT32. Testing for mips64
on CheriBSD

[kib]

The patch as-is is fine for MIPSes which are not 74K.

Issue is that shared page double-mapped, or even N-way mapped. One mapping is in for kernel, and another mappings are at ABI-determined addresses, at the top of the user AS. Apparently, MIPS pmap has very serious bug, manifesting on 24K/74K cores where cache is VIVT and can be aliased. Pmap does not handle this and indeed allows aliasing to corrupt the data.

Please see the heated discussion of r307626 and papering-over in r308662. In other words, SV_TIMEKEEP would have severe troubles on MIPS, and SV_SHP might require at least data cache invalidation and global instruction cache invalidation after trampoline is copied to the shared page.

[brooks]

• Make MIPS shared page support optional.
• Shared page support works fine on QEMU MALTA so enable there.

[kib]

sys/mips/conf/std.MALTA

31

Might be, rename the option to something more generic and also utilize it for kern/vfs_bio.c:4706 (it is the same phenomenon/bug, after all) ?

sys/mips/include/vmparam.h

100–101

I just noted the comment above, not sure if it should be somehow comply with.

[brooks]

• Rebase
• Rename option and use to enable buffer cache improvments.

[kib]

Note that MIPS MD in no way disables creating aliases, it just silently corrupts aliased memory.

Might be, MIPS_USE_PAGE_ALIASING would be better name.

[brooks]

• s/MIPS_ALLOW_PAGE_ALIASING/MIPS_USE_PAGE_ALIASING/