x86: Add defines for workaround bits in AMD's MSR "Decode Configuration"

They are a bit more informative than raw hexadecimal values.

While here, sort existing defines of bits for AMD MSRs to match the address
order.

Reviewed by: kib, emaste
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D41816

(cherry picked from commit 125bbadf6084ac341673c9eb1979a740d3d5899a)