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Full softfloat and hardfloat support for RISC-V
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Authored by br on Nov 15 2016, 4:57 PM.
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Details

Summary

Tested by hand in SMP environment. Works stable. No testsuite available for RISC-V yet due to missing C plus plus

N.B. There is no floating point exception traps on RISC-V.
N.B. No flq, fsq (for quad access) instructions supported yet by GCC 6.1

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br retitled this revision from to Full softfloat and hardfloat support for RISC-V.
br updated this object.
br edited the test plan for this revision. (Show Details)
br added a reviewer: emaste.
lib/libc/riscv/gen/_setjmp.S
63–80

Should you commit this (and related) independently?

fix comment; use ifndef SOFTFLOAT for setjmp

andrew added inline comments.
lib/msun/riscv/fenv.h
77–78

You could move this to the #else below.

share/mk/src.opts.mk
239

I think this could be ... || ${__TT} == "riscv"

This revision was automatically updated to reflect the committed changes.
share/mk/src.opts.mk
239

thanks Andrew, will know!