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eswin reset driver
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Authored by br on Nov 30 2024, 8:46 PM.
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Details

Summary

Add eswin reset driver

Test Plan

Works on SiFive Premier P550

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Event Timeline

br requested review of this revision.Nov 30 2024, 8:46 PM
sys/riscv/eswin/eswin_reset.c
170

Why not just use IDs from 0 through N? You can then do >> 5 to get the word number and & 31 to get the bit offset. That's really how the FDT should have represented it too, probably... logically it's just a big bit vector.

store both reg and bit in the hwreset *id

sys/riscv/eswin/eswin_reset.c
165

<< 5 but & 0xff is inconsistent and not what I said (which was & 31 ie 0x1f). Also is cells[1] the bit number or bit mask? Because it's being encoded as if it's the former, but used in the other functions as if it's the latter (no 1u << bit).

mhorne added inline comments.
sys/riscv/eswin/eswin_reset.c
51

Unused?

This revision is now accepted and ready to land.Dec 2 2024, 9:55 PM
This revision was automatically updated to reflect the committed changes.