Paths

Table of Contentst

Differential D39336

arm64/disassem.c: Add support str/strb/strh instructions
ClosedPublic
Actions

Authored by koliagogsadze_gmail.com on Mar 29 2023, 9:28 PM.

Tags

None

Referenced Files

	Unknown Object (File)
	Mon, Jul 28, 12:07 PM

	Unknown Object (File)
	Mon, Jul 28, 11:30 AM

	Unknown Object (File)
	Mon, Jul 28, 8:23 AM

	Unknown Object (File)
	Jul 4 2025, 3:34 PM

	Unknown Object (File)
	Jul 1 2025, 11:45 PM

	Unknown Object (File)
	Jun 29 2025, 5:35 PM

	Unknown Object (File)
	Jun 21 2025, 10:37 PM

	Unknown Object (File)
	Jun 4 2025, 3:50 AM

View All 70 Files

Subscribers

Details

Reviewers

mhorne
andrew
manu

Commits

rGbf64c283250a: arm64/disassem.c: Add support str/strb/strh instructions
rG7edb7adf8c8b: arm64/disassem.c: Add support str/strb/strh instructions

Summary

Added dissassembly support for all types str/strb/strh instruction enconding.

Test Plan

Tested all possible combinations, test branch where I manually
tested my changes:
https://github.com/freebsd/freebsd-src/compare/main...toor1245:freebsd-src:arm64-disasm-str-test

Diff Detail

Repository

rG FreeBSD src repository

Lint

Lint Not Applicable

Unit

Tests Not Applicable

Event Timeline

koliagogsadze_gmail.com created this revision.Mar 29 2023, 9:28 PM

Herald added a reviewer: manu. · View Herald TranscriptMar 29 2023, 9:28 PM

Herald added subscribers: emaste, imp. · View Herald Transcript

koliagogsadze_gmail.com requested review of this revision.Mar 29 2023, 9:28 PM

Harbormaster completed remote builds in B50671: Diff 119641.Mar 29 2023, 9:28 PM

review refs:
str (immediate):
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/STR--immediate---Store-Register--immediate--
str (register):
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/STR--register---Store-Register--register--
strb (immediate):
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/STRB--immediate---Store-Register-Byte--immediate--
strb (register):
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/STRB--register---Store-Register-Byte--register--
strh (immediate):
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/STRH--immediate---Store-Register-Halfword--immediate--
strh (register):
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/STRH--register---Store-Register-Halfword--register--

Looks good to me, thanks for linking the documentation!

sys/arm64/arm64/disassem.c
199	The only thing I'm unsure about is the `OP_SF32`. It's exact purpose is not so clear to me but I trust it's correct based on `ldrb/ldrh` and your testing.

This revision is now accepted and ready to land.Apr 14 2023, 6:14 PM

Closed by commit rG7edb7adf8c8b: arm64/disassem.c: Add support str/strb/strh instructions (authored by koliagogsadze_gmail.com, committed by mhorne). · Explain WhyApr 25 2023, 8:24 PM

This revision was automatically updated to reflect the committed changes.

mhorne added a commit: rG7edb7adf8c8b: arm64/disassem.c: Add support str/strb/strh instructions.

mhorne added a commit: rGbf64c283250a: arm64/disassem.c: Add support str/strb/strh instructions.Jun 9 2023, 7:58 PM

Revision Contents
Changeset List

Path

Size

sys/

arm64/

arm64/

18 lines

Diff 121043

sys/arm64/arm64/disassem.c

Loading...