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vm.h

Differential D38945

Switch the arm64 VM_MEMATTR_DEVICE to nGnRE
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Authored by andrew on Mar 7 2023, 2:48 PM.

Details

Reviewers

manu

Group Reviewers

arm64

Commits

rG3473f2832284: Switch the arm64 VM_MEMATTR_DEVICE to nGnRE

Summary

Move device memory to a weaker type. The new device memory type allows
the system to acknowledge a write to a device before the write has
completed. This is inline with VM_MEMATTR_DEVICE on armv6/armv7.

Diff Detail

Repository

rG FreeBSD src repository

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No Test Coverage

Build Status

Buildable 50197
Build 47089: arc lint + arc unit

Event Timeline

andrew created this revision.Mar 7 2023, 2:48 PM

Herald added a reviewer: manu. · View Herald TranscriptMar 7 2023, 2:48 PM

Herald added subscribers: emaste, imp. · View Herald Transcript

Harbormaster completed remote builds in B50188: Diff 118454.Mar 7 2023, 2:48 PM

andrew requested review of this revision.Mar 7 2023, 2:48 PM

andrew added a parent revision: D38944: Allow forcing non-posted memory on arm64.

andrew retitled this revision from Siwtch the arm64 VM_MEMATTR_DEVICE to nGnRE to Switch the arm64 VM_MEMATTR_DEVICE to nGnRE.Mar 7 2023, 3:46 PM

Seems legit, but I never can keep all the memory models of arm in my head for more than a minute...

sys/arm64/include/vm.h
38–39	You've changed it, so maybe a comment touchup is in order.

Remove an outdated comment

Harbormaster completed remote builds in B50197: Diff 118475.Mar 7 2023, 5:48 PM

nGnR means the hardware won't merge or reorder memory accesses. nE means it won't acknowledge a write until the device does so, switching to E relaxes this to allow this acknowledgement to happen earlier. Care needs to be taken if we need to check a write has completed but this should be mostly handled as it's also the case on armv6/armv7.

This revision was not accepted when it landed; it landed in state Needs Review.Mar 16 2023, 4:46 PM

Closed by commit rG3473f2832284: Switch the arm64 VM_MEMATTR_DEVICE to nGnRE (authored by andrew). · Explain Why

This revision was automatically updated to reflect the committed changes.

andrew added a commit: rG3473f2832284: Switch the arm64 VM_MEMATTR_DEVICE to nGnRE.

Revision Contents
Changeset List

Path

Size

sys/

arm64/

include/

vm.h

6 lines

Diff 118475

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sys/arm64/include/vm.h

	Show First 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
	.It Sy Type Ta Sy Size			.It Sy Type Ta Sy Size
	.It short Ta 2			.It short Ta 2
	.It int Ta 4			.It int Ta 4
	.It long Ta sizeof(void*)			.It long Ta sizeof(void*)
	.It long long Ta 8			.It long long Ta 8
	.It float Ta 4			.It float Ta 4
	.It double Ta 8			.It double Ta 8
	.El			.El
	.Bl -column -offset indent ".Sy Architecture" ".Sy sizeof(void *)" ".Sy "sizeof(long double)"			.Bl -column -offset indent "Sy Architecture" "Sy sizeof(void *)" "Sy "sizeof(long double)"
	.It Sy Architecture Ta Sy sizeof(void *) Ta Sy sizeof(long double)			.It Sy Architecture Ta Sy sizeof(void *) Ta Sy sizeof(long double)
	.It amd64 Ta 8 Ta 16			.It amd64 Ta 8 Ta 16
	.It arm Ta 4 Ta 8			.It arm Ta 4 Ta 8
	.It armeb Ta 4 Ta 8			.It armeb Ta 4 Ta 8
	.It armv6 Ta 4 Ta 8			.It armv6 Ta 4 Ta 8
	.It arm64 Ta 8 Ta 16			.It arm64 Ta 8 Ta 16
	.It i386 Ta 4 Ta 12			.It i386 Ta 4 Ta 12
	.It mips Ta 4 Ta 8			.It mips Ta 4 Ta 8
	.It mipsel Ta 4 Ta 8			.It mipsel Ta 4 Ta 8
	.It mipsn32 Ta 4 Ta 8			.It mipsn32 Ta 4 Ta 8
	.It mips64 Ta 8 Ta 8			.It mips64 Ta 8 Ta 8
	.It mips64el Ta 8 Ta 8			.It mips64el Ta 8 Ta 8
	.It powerpc Ta 4 Ta 8			.It powerpc Ta 4 Ta 8
	.It powerpc64 Ta 8 Ta 8			.It powerpc64 Ta 8 Ta 8
	.It riscv Ta 8 Ta			.It riscv Ta 8 Ta
	.It sparc64 Ta 8 Ta 16			.It sparc64 Ta 8 Ta 16
	.El			.El
	.Ss Endianness and Char Signedness			.Ss Endianness and Char Signedness
	.Bl -column -offset indent ".Sy Architecture" ".Sy Endianness" ".Sy "char Signedness"			.Bl -column -offset indent "Sy Architecture" "Sy Endianness" "Sy "char Signedness"
	.It Sy Architecture Ta Sy Endianness Ta Sy char Signedness			.It Sy Architecture Ta Sy Endianness Ta Sy char Signedness
	.It amd64 Ta little Ta signed			.It amd64 Ta little Ta signed
	.It arm Ta little Ta unsigned			.It arm Ta little Ta unsigned
	.It armeb Ta big Ta unsigned			.It armeb Ta big Ta unsigned
	.It armv6 Ta little Ta unsigned			.It armv6 Ta little Ta unsigned
	.It arm64 Ta little Ta unsigned			.It arm64 Ta little Ta unsigned
	.It i386 Ta little Ta signed			.It i386 Ta little Ta signed
	.It mips Ta big Ta signed			.It mips Ta big Ta signed
	.It mipsel Ta little Ta signed			.It mipsel Ta little Ta signed
	.It mipsn32 Ta big Ta signed			.It mipsn32 Ta big Ta signed
	.It mips64 Ta big Ta signed			.It mips64 Ta big Ta signed
	.It mips64el Ta little Ta signed			.It mips64el Ta little Ta signed
	.It powerpc Ta big Ta unsigned			.It powerpc Ta big Ta unsigned
	.It powerpc64 Ta big Ta unsigned			.It powerpc64 Ta big Ta unsigned
	.It riscv Ta little Ta signed			.It riscv Ta little Ta signed
	.It sparc64 Ta big Ta signed			.It sparc64 Ta big Ta signed
	.El			.El
	.Ss Page Size			.Ss Page Size
	.Bl -column -offset indent ".Sy Architecture" ".Sy Page Sizes"			.Bl -column -offset indent "Sy Architecture" "Sy Page Sizes"
	.It Sy Architecture Ta Sy Page Sizes			.It Sy Architecture Ta Sy Page Sizes
	.It amd64 Ta 4K, 2M, 1G			.It amd64 Ta 4K, 2M, 1G
	.It arm Ta 4K			.It arm Ta 4K
	.It armeb Ta 4K			.It armeb Ta 4K
	.It armv6 Ta 4K, 1M			.It armv6 Ta 4K, 1M
	.It arm64 Ta 4K, 2M, 1G			.It arm64 Ta 4K, 2M, 1G
	.It i386 Ta 4K, 2M (PAE), 4M			.It i386 Ta 4K, 2M (PAE), 4M
	.It mips Ta 4K			.It mips Ta 4K
	.It mipsel Ta 4K			.It mipsel Ta 4K
	.It mipsn32 Ta 4K			.It mipsn32 Ta 4K
	.It mips64 Ta 4K			.It mips64 Ta 4K
	.It mips64el Ta 4K			.It mips64el Ta 4K
	.It powerpc Ta 4K			.It powerpc Ta 4K
	.It powerpc64 Ta 4K			.It powerpc64 Ta 4K
	.It riscv Ta 4K			.It riscv Ta 4K
	.It sparc64 Ta 8K			.It sparc64 Ta 8K
	.El			.El
	.Ss Floating Point			.Ss Floating Point
	.Bl -column -offset indent ".Sy Architecture" ".Sy float, double" ".Sy long double"			.Bl -column -offset indent "Sy Architecture" "Sy float, double" "Sy long double"
	.It Sy Architecture Ta Sy float, double Ta Sy long double			.It Sy Architecture Ta Sy float, double Ta Sy long double
	.It amd64 Ta hard Ta hard, 80 bit			.It amd64 Ta hard Ta hard, 80 bit
	.It arm Ta soft Ta soft, double precision			.It arm Ta soft Ta soft, double precision
	.It armeb Ta soft Ta soft, double precision			.It armeb Ta soft Ta soft, double precision
	.It armv6 Ta hard Ta hard, double precision			.It armv6 Ta hard Ta hard, double precision
	.It arm64 Ta hard Ta soft, quad precision			.It arm64 Ta hard Ta soft, quad precision
	.It i386 Ta hard Ta hard, 80 bit			.It i386 Ta hard Ta hard, 80 bit
	.It mips Ta soft Ta identical to double			.It mips Ta soft Ta identical to double
	Show All 12 Lines
	Other macros, including those required by the language standard, are not			Other macros, including those required by the language standard, are not
	included here.			included here.
	.Pp			.Pp
	The full set of predefined macros can be obtained with this command:			The full set of predefined macros can be obtained with this command:
	.Bd -literal -offset indent			.Bd -literal -offset indent
	cc -x c -Dm -E /dev/null			cc -x c -Dm -E /dev/null
	.Ed			.Ed
	.Pp			.Pp
	Common type size and endianness macros:			Common type size and endianness macros:
				impUnsubmitted Not Done Inline Actions Did you want to also clarify this is available only when sys/endian.h is included? imp: Did you want to also clarify this is available only when sys/endian.h is included?
				kibAuthorUnsubmitted Not Done Inline Actions I want to leave the scope of this change to typesetting only. Note that sys/endian.h is not the only such problem in the text. E.g. __ARM_ARCH requires machine/asle.h for older compilers. kib: I want to leave the scope of this change to typesetting only. Note that sys/endian.h is not…
	.Bl -column -offset indent "BYTE_ORDER" ".Sy Meaning"			.Bl -column -offset indent "BYTE_ORDER" "Sy Meaning"
	.It Sy Macro Ta Sy Meaning			.It Sy Macro Ta Sy Meaning
	.It Dv __LP64__ Ta 64-bit (8-byte) long and pointer, 32-bit (4-byte) int			.It Dv __LP64__ Ta 64-bit (8-byte) long and pointer, 32-bit (4-byte) int
	.It Dv __ILP32__ Ta 32-bit (4-byte) int, long and pointer			.It Dv __ILP32__ Ta 32-bit (4-byte) int, long and pointer
	.It Dv BYTE_ORDER Ta Either Dv BIG_ENDIAN or Dv LITTLE_ENDIAN .			.It Dv BYTE_ORDER Ta Either Dv BIG_ENDIAN or Dv LITTLE_ENDIAN .
	.Dv PDP11_ENDIAN is not used on FreeBSD.			.Dv PDP11_ENDIAN
				is not used on
				baptUnsubmitted Not Done Inline Actions Should be .Fx instead of hard coded FreeBSD bapt: Should be ``` .Fx ``` instead of hard coded FreeBSD
				.Fx .
	.El			.El
	.Pp			.Pp
	Architecture-specific macros:			Architecture-specific macros:
	.Bl -column -offset indent ".Sy Architecture" ".Sy Predefined macros"			.Bl -column -offset indent "Sy Architecture" "Sy Predefined macros"
	.It Sy Architecture Ta Sy Predefined macros			.It Sy Architecture Ta Sy Predefined macros
	.It amd64 Ta Dv __amd64__, Dv __x86_64__			.It amd64 Ta Dv __amd64__, Dv __x86_64__
	.It arm Ta Dv __arm__			.It arm Ta Dv __arm__
	.It armeb Ta Dv __arm__			.It armeb Ta Dv __arm__
	.It armv6 Ta Dv __arm__, Dv __ARM_ARCH >= 6			.It armv6 Ta Dv __arm__, Dv __ARM_ARCH >= 6
	.It arm64 Ta Dv __aarch64__			.It arm64 Ta Dv __aarch64__
	.It i386 Ta Dv __i386__			.It i386 Ta Dv __i386__
	.It mips Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_o32			.It mips Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_o32
	Show All 17 Lines

Switch the arm64 VM_MEMATTR_DEVICE to nGnREClosedPublicActions