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Set appropriate bus number in Marvell PCIe driver
Needs ReviewPublic

Authored by bsz_semihalf.com on Jul 27 2016, 8:10 AM.

Details

Reviewers
ian
Group Reviewers
ARM
Summary

PCIe interfaces of Marvell SoCs are separate and not linked together
in a bus, so if there is more than one PCIB device it is necessary
to set an appropriate bus number from which actual enumeration should
start.

Submitted by: Marcin Mazurek <mma@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential revision:
Reviewed by:

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rS FreeBSD src repository - subversion
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