Differential D7031

if_awg: performance improvements
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Authored by jmcneill on Jun 30 2016, 2:05 AM.

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manu

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ARM

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rS302786: Allwinner Gigabit EMAC performance improvements.

Summary

H3/A83T: Use PLL_PERIPH/2 for AHB2 parent clock
awg: support DEVICE_POLLING
awg: increase TX descriptors to 1024
awg: add support for passing a chain of mbufs to if_input, reducing the number of calls to mtx_unlock/mtx_lock
awg: remove duplicate byteswap when setting TX_INT_CTL
awg: set undocumented "TX_NEXT_FRAME" bit in TX control 1 register. Accoriding to the BSP, setting this bit allows the DMA engine to operate on a second packet while receiving another.

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rS FreeBSD src repository - subversion

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jmcneill updated this revision to Diff 18030.Jun 30 2016, 2:05 AM

jmcneill retitled this revision from to if_awg: performance improvements.

jmcneill updated this object.

jmcneill edited the test plan for this revision. (Show Details)

jmcneill added a reviewer: ARM.

jmcneill set the repository for this revision to rS FreeBSD src repository - subversion.

jmcneill added a project: ARM.

Herald added subscribers: andrew, imp. · View Herald TranscriptJun 30 2016, 2:05 AM

Before on H3 I did ~85Mbps in TX, 95Mbps in RX, with this patch I do 95Mbps in RX and TX.
I didn't tweak the sysctl, and I don't know if DEVICE_POLLING is enabled or not.

This revision is now accepted and ready to land.Jul 13 2016, 12:31 PM

Closed by commit rS302786: Allwinner Gigabit EMAC performance improvements. (authored by jmcneill). · Explain WhyJul 13 2016, 8:47 PM

This revision was automatically updated to reflect the committed changes.