Differential D5468

Allwinner A31 - Fix MMC FIFO register offset
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Authored by jmcneill_invisible.ca on Feb 26 2016, 10:45 PM.

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Reviewers

manu_bidouilliste.com

Group Reviewers

ARM

Commits

rS296149: Fix PIO mode on A31 and later SoCs.

Summary

Newer Allwinner MMC implementations use a different FIFO register offset (0x200 instead of 0x100). Unfortunately this is not reflected in the FDT, likely because the Linux driver always uses DMA.

This change selects the correct FIFO register offset based on the Allwinner SoC family:

sun4i, sun5i, and sun7i: 0x100
sun6i, sun8i, and sun9i: 0x200

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rS FreeBSD src repository - subversion

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jmcneill_invisible.ca updated this revision to Diff 13817.Feb 26 2016, 10:45 PM

jmcneill_invisible.ca retitled this revision from to Allwinner A31 - Fix MMC FIFO register offset.

jmcneill_invisible.ca updated this object.

jmcneill_invisible.ca edited the test plan for this revision. (Show Details)

jmcneill_invisible.ca added a reviewer: ARM.

jmcneill_invisible.ca set the repository for this revision to rS FreeBSD src repository - subversion.

jmcneill_invisible.ca added a project: ARM.

Herald added subscribers: andrew, imp. · View Herald TranscriptFeb 26 2016, 10:45 PM

manu_bidouilliste.com added a subscriber: manu_bidouilliste.com.Feb 26 2016, 11:49 PM

manu_bidouilliste.com added inline comments.

sys/arm/allwinner/a10_mmc.c
189	Shouldn't the default case be ALLWINNERSOC_SUN6I and the default return ENXIO ?

jmcneill_invisible.ca added inline comments.Feb 27 2016, 12:08 AM

sys/arm/allwinner/a10_mmc.c
189	Not sure. The newer devices all use the new offset, so this saves us from having to add extra cases later on.

manu_bidouilliste.com accepted this revision.Feb 27 2016, 4:32 AM

manu_bidouilliste.com added a reviewer: manu_bidouilliste.com.

This revision is now accepted and ready to land.Feb 27 2016, 4:32 AM

Mhm, don't really know what 'Accept" does. I thought this was to reflect a positive review from my side but I guess it's more general than that.

Closed by commit rS296149: Fix PIO mode on A31 and later SoCs. (authored by jmcneill). · Explain WhyFeb 27 2016, 10:26 PM

This revision was automatically updated to reflect the committed changes.

Revision Contents
Changeset List

Path

Size

sys/

arm/

allwinner/

a10_mmc.h

3 lines

a10_mmc.c

20 lines

Diff 13817

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sys/arm/allwinner/a10_mmc.h