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Allwinner A31 - Fix MMC FIFO register offset
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Authored by jmcneill_invisible.ca on Feb 26 2016, 10:45 PM.
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Details

Summary

Newer Allwinner MMC implementations use a different FIFO register offset (0x200 instead of 0x100). Unfortunately this is not reflected in the FDT, likely because the Linux driver always uses DMA.

This change selects the correct FIFO register offset based on the Allwinner SoC family:

  • sun4i, sun5i, and sun7i: 0x100
  • sun6i, sun8i, and sun9i: 0x200

Diff Detail

Repository
rS FreeBSD src repository - subversion
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Event Timeline

jmcneill_invisible.ca retitled this revision from to Allwinner A31 - Fix MMC FIFO register offset.
jmcneill_invisible.ca updated this object.
jmcneill_invisible.ca edited the test plan for this revision. (Show Details)
jmcneill_invisible.ca added a reviewer: ARM.
jmcneill_invisible.ca set the repository for this revision to rS FreeBSD src repository - subversion.
jmcneill_invisible.ca added a project: ARM.
manu_bidouilliste.com added inline comments.
sys/arm/allwinner/a10_mmc.c
189 ↗(On Diff #13817)

Shouldn't the default case be ALLWINNERSOC_SUN6I and the default return ENXIO ?

sys/arm/allwinner/a10_mmc.c
189 ↗(On Diff #13817)

Not sure. The newer devices all use the new offset, so this saves us from having to add extra cases later on.

This revision is now accepted and ready to land.Feb 27 2016, 4:32 AM

Mhm, don't really know what 'Accept" does. I thought this was to reflect a positive review from my side but I guess it's more general than that.

This revision was automatically updated to reflect the committed changes.