Add SMP support to A31.
All allwinner SoC with the same number of core use the same register address for core configuration so we use that.
Move the file from a20/a20_mp.c to aw_mp.c
Details
- Reviewers
jmcneill andrew - Group Reviewers
ARM - Commits
- rS296426: Add SMP support for the Allwinner A31 and A31s. This updated the existing
Apply patch and build kernel
Diff Detail
- Repository
- rS FreeBSD src repository - subversion
- Lint
Lint Passed - Unit
No Test Coverage - Build Status
Buildable 2568 Build 2585: arc lint + arc unit
Event Timeline
sys/arm/allwinner/aw_mp.c | ||
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91 | You can use cp15_l2ctlr_get here, from machine/cpu-v6.h. | |
92 | Use CPUV7_L2CTLR_NPROC from machine/armreg.h | |
172 | How similar are the two functions? i.e. could the common bits be pulled out to a helper function? | |
180 | Split lines should be indented the same number of tabs, followed by 4 spaces. | |
213 | 8? |
sys/arm/allwinner/aw_mp.c | ||
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213 | We need to write 0xff, 0x7f, 0x3f etc ... |
Merge back into one function and split the diff bits into switch statement.
Use cp15_l2ctlr_get and CPUV7_L2CTLR_NPROC instead of inline assembly.
sys/arm/allwinner/aw_mp.c | ||
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115 | I think this code could be reworked a little to add separate functions for the two groups of SoCs. These would just map/unmap the registers, then call into common functions to power on the new CPUs. They should pass in the needed tag and handles, and maybe registers if applicable. This would help for when we move to start CPUs through the PLATFORM code. | |
140 | The indentation here was correct | |
168–169 | This should be tabbed out to the same level as the previous line, followed by 4 spaces. You should then be able to fit both on a single line. |
sys/arm/allwinner/aw_mp.c | ||
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202 | Yeah, last diff add defines for this value. |
sys/arm/conf/A20 | ||
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34 ↗ | (On Diff #14025) | options <tab> |