Hide some lines from the main GENERIC files by mimicking arm64's model.
I do not have any intention of creating a std.riscv or SIFIVE
configuration file at this time.
Paths
| Differential D42910 Authored by mhorne on Dec 5 2023, 6:38 PM.
Details
Summary Hide some lines from the main GENERIC files by mimicking arm64's model. I do not have any intention of creating a std.riscv or SIFIVE
Diff Detail
Event TimelineHerald added a subscriber: imp. · View Herald TranscriptDec 5 2023, 6:38 PM2023-12-05 18:38:16 (UTC+0) Harbormaster completed remote builds in B54797: Diff 131038.Dec 5 2023, 6:38 PM2023-12-05 18:38:18 (UTC+0) mhorne added a child revision: D42911: riscv: add more dump features to GENERIC.Dec 5 2023, 6:38 PM2023-12-05 18:38:27 (UTC+0) Comment Actions std.sifive not being what you'd expect it to be bugged me in the past, thanks for the cleanup :) This revision is now accepted and ready to land.Dec 5 2023, 6:40 PM2023-12-05 18:40:42 (UTC+0) Closed by commit rGbd79cafe70c8: riscv: tweak SoC-specific conf organization (authored by mhorne). · Explain WhyDec 5 2023, 7:31 PM2023-12-05 19:31:02 (UTC+0) This revision was automatically updated to reflect the committed changes.
Revision Contents
Diff 131048 sys/riscv/conf/GENERIC
sys/riscv/conf/std.allwinner
sys/riscv/conf/std.sifive
sys/riscv/sifive/std.sifive
|