arm64/disassem.c: add type01 instruction definitions

[koliagogsadze_gmail.com]

Summary

Add disassembly support for the following
instructions:
adc, adcs, asr, cls, clz, lsl, lsr, rbit, rev,
rev16, rev32, ror, ngc, sbc, ngcs, sbcs, sdiv,
smulh, udiv, umulh.

Test Plan

https://github.com/toor1245/freebsd-src/pull/5

[koliagogsadze_gmail.com]

refs to review:
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/ADC--Add-with-Carry-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/ADCS--Add-with-Carry--setting-flags-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/CLS--Count-Leading-Sign-bits-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/CLZ--Count-Leading-Zeros-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/CRC32B--CRC32H--CRC32W--CRC32X--CRC32-checksum-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/CRC32CB--CRC32CH--CRC32CW--CRC32CX--CRC32C-checksum-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/ASR--register---Arithmetic-Shift-Right--register---an-alias-of-ASRV-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/LSL--register---Logical-Shift-Left--register---an-alias-of-LSLV-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/LSR--register---Logical-Shift-Right--register---an-alias-of-LSRV-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/ROR--register---Rotate-Right--register---an-alias-of-RORV-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/RBIT--Reverse-Bits-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/REV--Reverse-Bytes-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/REV16--Reverse-bytes-in-16-bit-halfwords-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/REV32--Reverse-bytes-in-32-bit-words-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/REV64--Reverse-Bytes--an-alias-of-REV-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/NGC--Negate-with-Carry--an-alias-of-SBC-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/SBC--Subtract-with-Carry-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/NGCS--Negate-with-Carry--setting-flags--an-alias-of-SBCS-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/SBCS--Subtract-with-Carry--setting-flags-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/SDIV--Signed-Divide-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/SMULH--Signed-Multiply-High-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/UDIV--Unsigned-Divide-?lang=en
https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/UMULH--Unsigned-Multiply-High-?lang=en

[mhorne]

I did not look at the encodings in detail.

sys/arm64/arm64/disassem.c

308

is there a difference?

[koliagogsadze_gmail.com]

sys/arm64/arm64/disassem.c

308

There's no difference. Actually | for readability see line 364:

case '|':
    * skip */
     format++;
     break;