This commit introduces support for etherswitch devices that utilize SMI as a way of accessing its registers. SMI register is located in address space of mge -- access to it was exported through MDIO interface.
Attachment functions were enhanced so as to ensure proper initialisation in both cases: 1) PHYs attached directly to mge, 2) PHYs attached to switch device and switch attached to mge. Attachment of etherswitch device depends on dts entry with compatible="mrvl,sw" property. If none is found, typical PHY attachment procedure follows.
In case of switch attached, PHYs' status and configuration is accessible via etherswitchcfg, and ifconfig shows always-up, non-configurable mge interfaces.
Due to the fact that there may be simultaneous accessess to SMI registers (e.g. from PHY attached to one of mge instances and switch to the other), SMI access interlock was added. It is SX lock, because sleep ability is necessary -- busy-waiting would result in poor performance due to long delays required by hardware. Underlying switch driver is obliged to use sleepable locks as well.