By default the PPI are masked when the secondary CPU is started. Implement a method to allow unmasking this previously configured interrupt. This approach is more elegant than the one in GICv2, where the TMR PPIs are hardcoded in gic_init_secondary routine.
I would prefer if we did something like the proposal I posted to arch, https://lists.freebsd.org/pipermail/freebsd-arch/2015-July/017270.html. It allows us to mark interrupts as needing to be unmasked on all cpus.
I like the idea of doing sth generic. What is your ETA on this?
If it takes more than 2-3 weeks maybe it'd be good to submit anything that gives us support for PPIs and revert it once an elegant solution is done? I mean this patch or even port an ugly hack from gic.c, whatever, since it'd be only temporary. Without this, the GICv3 combined with SMP is pretty useless.
Andrew, Ed, what do you think?
I tend to agree with you. I really want to see all of the changes necessary to support ThunderX as soon as possible, as we'll soon have new silicon in the Sentex colo and can then open the system up to wider use. But it really comes down the potential timeline for the final solution.