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powerpc64: Optimize radix trap handling a little more

Authored by jhibbits on Apr 27 2021, 2:21 AM.



Since PCPU can live in a GPR for a while longer, let it, rather than
re-getting it in yet another register. MFSPR is an expensive operation,
12 clock latency on POWER9, so the fewer operations we need, the better.

Since the check is tightly coupled to the fetch, by reducing the number
of fetch+check, we reduce the stalls, and improve the performance
marginally. Buildworld was measured at a ~5-7% improvement on a single

Test Plan

Boot on radix and HPT

Diff Detail

rG FreeBSD src repository
Automatic diff as part of commit; lint not applicable.
Automatic diff as part of commit; unit tests not applicable.

Event Timeline

Looks good to me. Thanks! There are probably more instances of this kind of thing lying around.

This revision is now accepted and ready to land.Apr 29 2021, 12:29 PM