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powerpc64: Optimize radix trap handling a little more

Description

powerpc64: Optimize radix trap handling a little more

Summary:
Since PCPU can live in a GPR for a while longer, let it, rather than
re-getting it in yet another register. MFSPR is an expensive operation,
12 clock latency on POWER9, so the fewer operations we need, the better.

Since the check is tightly coupled to the fetch, by reducing the number
of fetch+check, we reduce the stalls, and improve the performance
marginally. Buildworld was measured at a ~5-7% improvement on a single
run.

Reviewed By: nwhitehorn
Differential Revision: https://reviews.freebsd.org/D30003

Details

Provenance
jhibbitsAuthored on May 1 2021, 12:58 AM
Reviewer
nwhitehorn
Differential Revision
D30003: powerpc64: Optimize radix trap handling a little more
Parents
rGe245ee2774b3: gicv3_its: Flush cache after allocating ITT memory
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