msun fixes for SPE

[jhibbits]

Summary

Fix FPU exception management for powerpcspe. Bits are in a different place from
the standard FPSCR, so we need to handle the shifting differences. Also,
there's no concept of a "software exception" raise, so we need to do exceptional
math to trigger the exception from software.

Test Plan

Should probably run the kyua test on powerpcspe.

[alfredo]

lib/msun/powerpc/fenv.h

52

Should it include FE_INVALID? Like:

#define FE_ALL_INVALID FE_INVALID

[jhibbits]

lib/msun/powerpc/fenv.h

52

Yes, it should be.

[jhibbits]

Address @alfredo's feedback

[alfredo]

I don't have any SPE board to try it. Anyway it LGTM