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msun fixes for SPE
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Authored by jhibbits on Dec 15 2019, 9:12 PM.

Details

Reviewers
bdragon
alfredo
Group Reviewers
PowerPC
Commits
rG664057961085: msun fixes for SPE
Summary

Fix FPU exception management for powerpcspe. Bits are in a different place from
the standard FPSCR, so we need to handle the shifting differences. Also,
there's no concept of a "software exception" raise, so we need to do exceptional
math to trigger the exception from software.

Test Plan

Should probably run the kyua test on powerpcspe.

Diff Detail

Repository
rG FreeBSD src repository
Lint
Automatic diff as part of commit; lint not applicable.
Unit
Automatic diff as part of commit; unit tests not applicable.

Event Timeline

alfredo added inline comments.
lib/msun/powerpc/fenv.h
51

Should it include FE_INVALID? Like:

#define FE_ALL_INVALID FE_INVALID
jhibbits added inline comments.
lib/msun/powerpc/fenv.h
51

Yes, it should be.

jhibbits marked an inline comment as done.

Address @alfredo's feedback

I don't have any SPE board to try it. Anyway it LGTM

This revision is now accepted and ready to land.May 4 2021, 8:24 PM
This revision was automatically updated to reflect the committed changes.