ARM: Implement synchronization of I cache for user mode address space

[• ian]

sys/arm/arm/sys_machdep.c

69

-l in align (should be capitalized too)

73

I'm not sure it's necessary to align to a cacheline. the cache ops themselves don't need it, doing any VA in the line will clean/inval the whole line accoruding to the arm arm.

77

PAGE_SIZE-1 can be spelled PAGE_MASK.

93

+a in Invalidate

120

I cannot figure out what the tests with the >>4 expressions are for.

Couldn't this whole check be reduced to just addr+len > VM_MAXUSER_ADDRESS? (Note: not >= because addr+len is the first byte not affected by the operation.)

124

Pedantically, this should be MAX(addr, VM_MAXUSER_ADDRESS) -- either the bad access is above the line or right at the point the operation crosses the line. Might need ugly casting to use MAX() here tho.

[mmel]

Address issues in previous comments.

[• ian]

committed as r283947