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powerpc64/powernv: Don't mask MSIs in OPAL
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Authored by jhibbits on Sep 29 2018, 3:04 AM.

Details

Summary

Discussing with Benjamin Herrenschmidt, MSIs, and edge-triggered
interrupts in general, must not be masked in XICS and XIVE, else
subsequent interrupts may be ignored.

Testing locally on my Talos II (single CPU, 18-core POWER9), NVMe now
works with MSI, improving read throughput by ~70% (900MB/s -> 1.67GB/s,
with 64MB block size) over INTx interrupts, and snd_hda(4) now will
actually play music with MSI. Previously, snd_hda(4) would not receive
interrupts, timing out, and declaring the channels dead.

This has also been tested by Kevin Bowling, and others, with great
success. Kevin reported NVMe unusable on his Talos II prior to this
patch.

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Event Timeline

jhibbits created this revision.Sep 29 2018, 3:04 AM
kbowling accepted this revision.Sep 30 2018, 2:10 AM
This revision is now accepted and ready to land.Sep 30 2018, 2:10 AM
nwhitehorn accepted this revision.Oct 5 2018, 9:40 PM
This revision was automatically updated to reflect the committed changes.