Make sure both sides of the memory accesses in snd_hda (device and CPU)
can see coherent memory. This is needed on weakly ordered architectures
including PowerPC and ARM. Patch originally by mmel, with small changes.
Details
Details
- Reviewers
mav mmel - Commits
- rS337043: snd_hda: Synchronize DMA buffers for the control path
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Diff Detail
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- rS FreeBSD src repository - subversion
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The commit message is a bit misleading. This patch ensures DMA coherency only for control structures but audio data buffers are not covered by required bus_dmamap_sync() operations. (We simply don't have right sync operation for syncing in progress DMA buffers - something like make buffer range snapshot before CPU read and make buffer range snapshot after CPU write).
Can you, please, elaborate this fact in commit message.
Otherwise, LGTM.