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Differential D12832

Add 0xb OR opcode support to bhyve's instruction emulation
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Authored by grehan on Oct 30 2017, 7:17 AM.
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F166254074: D12832.id34447.diff
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F166253950: D12832.diff
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Details

Reviewers
araujo
Group Reviewers
bhyve
Commits
rS325261: Emulate the "OR reg, r/m" instruction (opcode 0BH).
Summary

The FreeBSD HDA code uses the 0xb variant of OR when accessing
device registers. Add this emulation, using the pattern of
existing OR code.

Test Plan

Run the HDA emulation patch with a FreeBSD 11.1 guest, and cat a .wav
file to /dev/dsp.

Diff Detail

Repository
rS FreeBSD src repository - subversion
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head/
sys/
amd64/
vmm/
32 lines

Diff 34577

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head/sys/amd64/vmm/vmm_instruction_emul.c

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