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Add gpio methods to read/write/configure the state of up to 32 pins simultaneously
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Authored by ian on Aug 1 2017, 7:13 PM.

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Summary

Sometimes it is necessary to combine several gpio pins into an ad-hoc bus and manipulate the pins as a group. In such cases manipulating the pins individualy is not an option, because the value on the "bus" assumes potentially-invalid intermediate values as each pin is changed in turn. Note that the "bus" may be something as simple as a bi-color LED where changing colors requires changing both gpio pins at once, or something as complex as a bitbanged multiplexed address/data bus connected to a microcontroller.

In addition to the absolute requirement of simultaneously changing the output values of driven pins, a desirable feature of these new methods is to provide a higher-performance mechanism for reading and writing multiple pins, especially from userland where pin-at-a-time access incurs a noticible syscall time penalty.

These new interfaces are NOT intended to abstract away all the ugly details of how gpio is implemented on any given platform. In fact, to use these properly you absolutely must know something about how the gpio hardware is organized. Typically there are "banks" of gpio pins controlled by registers which group several pins together. A bank may be as small as 2 pins or as big as "all the pins on the device, hundreds of them." In the latter case, a driver might support this interface by allowing access to any 32 adjacent pins within the overall collection. Or, more likely, any 32 adjacent pins starting at any multiple of 32. Whatever the hardware restrictions may be, you would need to understand them to use this interface.

In additional to defining the interfaces, two example implementations are included here, for imx5/6, and allwinner. These represent the two primary types of gpio hardware drivers. imx6 has multiple gpio devices, each implementing a single bank of 32 pins. Allwinner implements a single large gpio number space from 1-n pins, and the driver internally translates that linear number space to a bank+pin scheme based on how the pins are grouped into control registers. The allwinner implementation imposes the restriction that the first_pin argument to the new functions must always be pin 0 of a bank. (Since it's not obvious to a user what that might be, a manpage for the aw driver might be a good idea I guess.)

Test Plan

[Note: when reviewing this, start at the bottom with sys/gpio.h which has the comments that explain the API, then the driver code may make more sense.]

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Event Timeline

ian created this revision.Aug 1 2017, 7:13 PM
adrian accepted this revision.Aug 7 2017, 10:10 PM
adrian added a subscriber: adrian.

I like it!

This revision is now accepted and ready to land.Aug 7 2017, 10:10 PM
imp accepted this revision.Aug 7 2017, 10:13 PM

I'm happy with this. I've suggested tweaks that the author rejected for simplicity, and I'm OK with that outcome and the code is useful.

loos accepted this revision.Aug 8 2017, 3:11 AM

I'm happy with this too, please go ahead Ian.

This revision was automatically updated to reflect the committed changes.