pci: fix write order when sizing BARs

According to the PCI Local Specification rev. 3.0 in case of a 64-bit
BAR both the low and the high parts of the register should be set to
~0 before attempting to read back the size.

So far I have found no single device that has problems with the
previous approach, but I think it's better to stay on the safe size.

This commit should not introduce any functional change.

MFC after: 3 weeks
Sponsored by: Citrix Systems R&D
Reviewed by: jhb
Differential revision: https://reviews.freebsd.org/D11750