HomeFreeBSD

sdhci_fsl_fdt: Fix tuning code

Description

sdhci_fsl_fdt: Fix tuning code

  • Some of the register writes were already done in the generic tuning code. Remove them.
  • Increase the polling timeout. The previous value is probably fine, but since timeouts are treated as fatal errors increasing it to 200ms won't hurt.
  • Rework the HS400 switching code. Make sure that the switch happens at the right time. Reset the DLL0 block. We need to do that if u-boot has previously configured the controller in HS400 mode.
  • Check current timing before tuning. The tuning devmethod is always called, even for timings that don't require the tuning procedure.
  • Rework software tuning routine code. Use inner formula for clock divider calculation, as previous one was incorrect.
  • Implement custom re-tune procedure.

Co-authored-by: Hubert Mazur <hum@semihalf.com>
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D34027

Details

Provenance
mindal_semihalf.comAuthored on Dec 22 2021, 8:17 AM
wmaCommitted on Feb 22 2022, 8:58 AM
Differential Revision
D34027: sdhci_fsl_fdt: Fix tuning code
Parents
rGa974a7bcdf44: sdhci_fsl_fdt: Fix pulse width errata application
Branches
Unknown
Tags
Unknown