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Differential D30655

riscv: Add an hw.ncpu tunable to limit the number of cores
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Authored by jrtc27 on Jun 5 2021, 7:51 PM.
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mhorne
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riscv
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rG5720b8de4832: riscv: Add an hw.ncpu tunable to limit the number of cores
Summary

Based on a similar change to arm64 in 01a8235ea61c.

Diff Detail

Repository
rS FreeBSD src repository - subversion
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Lint Passed
Unit
No Test Coverage
Build Status
Buildable 39735
Build 36624: arc lint + arc unit

Event Timeline

jrtc27 created this revision.Jun 5 2021, 7:51 PM
Herald added a subscriber: imp. · View Herald TranscriptJun 5 2021, 7:51 PM
jrtc27 requested review of this revision.Jun 5 2021, 7:51 PM
Harbormaster completed remote builds in B39735: Diff 90468.Jun 5 2021, 7:51 PM
mhorne accepted this revision.Jun 7 2021, 8:54 PM
mhorne added inline comments.
sys/riscv/riscv/mp_machdep.c
548

No nicer way to do this I suppose :|

This revision is now accepted and ready to land.Jun 7 2021, 8:54 PM
Closed by commit rG5720b8de4832: riscv: Add an hw.ncpu tunable to limit the number of cores (authored by jrtc27). · Explain WhyJun 15 2021, 12:25 AM
This revision was automatically updated to reflect the committed changes.
jrtc27 added a commit: rG5720b8de4832: riscv: Add an hw.ncpu tunable to limit the number of cores.

Revision Contents
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sys/
riscv/
riscv/
21 lines

Diff 90468

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sys/riscv/riscv/mp_machdep.c

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