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Differential D14429

Support single core Zynq devices (MiniZed).
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Authored by skibo on Feb 18 2018, 7:14 PM.
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jmg
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rS361326: Bring in support for single core Zynq devices. Turns out that real
Summary

On Zynq platforms, get the CPU count from the SCU_CONFIG register. This is necessary to boot on Xilinx' new single core chips (such as on the MiniZed). I don't have access to MiniZed yet but I have been debugging on Xilinx' port of qemu which acts like a single core Zynq so I have been using this patch for a while.

Test Plan

Tested on Zedboard and qemu.

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Event Timeline

skibo created this revision.Feb 18 2018, 7:14 PM
skibo updated this revision to Diff 64986.Nov 28 2019, 12:19 AM

Minor style tweaks and whitespace clean-up.

Herald added a subscriber: andrew. · View Herald TranscriptNov 28 2019, 12:19 AM
jmg added a reviewer: jmg.May 16 2020, 1:34 AM
jmg added a comment.May 17 2020, 9:37 PM

Thanks, I'll look at committing this. I have a Cora Z7 that needs this.

jmg requested changes to this revision.May 19 2020, 9:10 AM

I just tested this on my Cora Z7-07S board, and it looks like there's a hardware bug that prevents this patch from working.

I added a printf to dump mp_maxid and mp_ncpus, and I get 1 and 2 respectively, which per the TRM indicates that it's suppose to have 2 cpus instead of 1.

This revision now requires changes to proceed.May 19 2020, 9:10 AM
skibo added a comment.May 19 2020, 2:33 PM
In D14429#548354, @jmg wrote:

I just tested this on my Cora Z7-07S board, and it looks like there's a hardware bug that prevents this patch from working.

I added a printf to dump mp_maxid and mp_ncpus, and I get 1 and 2 respectively, which per the TRM indicates that it's suppose to have 2 cpus instead of 1.

Crud. I guess the number of CPUs isn't properly represented in the SCU config register. Do you know the value of the entire register? From the u-boot prompt,
type "md 0xf8f00004 1". Another idea is to key off the device field of the SLCR's PSS_IDCODE register at 0xf8000530. Can you get that value too?
It also shows up in a sysctl under "hw.zynq.pss_idcode".

jmg added a comment.May 19 2020, 7:48 PM
In D14429#548455, @skibo wrote:
In D14429#548354, @jmg wrote:

I just tested this on my Cora Z7-07S board, and it looks like there's a hardware bug that prevents this patch from working.

I added a printf to dump mp_maxid and mp_ncpus, and I get 1 and 2 respectively, which per the TRM indicates that it's suppose to have 2 cpus instead of 1.

Crud. I guess the number of CPUs isn't properly represented in the SCU config register. Do you know the value of the entire register? From the u-boot prompt,
type "md 0xf8f00004 1". Another idea is to key off the device field of the SLCR's PSS_IDCODE register at 0xf8000530. Can you get that value too?
It also shows up in a sysctl under "hw.zynq.pss_idcode".

Thanks, tried to do this from FreeBSD, but couldn't figure out how to dump the entire register:

Zynq> md 0xf8f00004 1
f8f00004: 00000511                               ....
Zynq> md 0xf8000530 1
f8000530: 13723093                               .0r.

Hmm.. that sysctl didn't work, but there was pssid:

freebsd@generic:~ % sysctl hw.zynq.pssid
hw.zynq.pssid: 0x13723093: manufacturer: 0x49 device: 0x3 family: 0x1b sub-family: 0x9 rev: 0x1
skibo updated this revision to Diff 72006.May 19 2020, 10:22 PM

Check SLCR.PSS_IDCODE to determine if this is a single-core Zynq chip.

Herald added a subscriber: imp. · View Herald TranscriptMay 19 2020, 10:22 PM
Harbormaster completed remote builds in B31186: Diff 72006.May 19 2020, 10:22 PM
skibo added a comment.May 19 2020, 10:32 PM
In D14429#548577, @jmg wrote:

Thanks, tried to do this from FreeBSD, but couldn't figure out how to dump the entire register:

Zynq> md 0xf8f00004 1
f8f00004: 00000511                               ....
Zynq> md 0xf8000530 1
f8000530: 13723093                               .0r.

Hmm.. that sysctl didn't work, but there was pssid:

freebsd@generic:~ % sysctl hw.zynq.pssid
hw.zynq.pssid: 0x13723093: manufacturer: 0x49 device: 0x3 family: 0x1b sub-family: 0x9 rev: 0x1

I found some interesting reading on the S series Zynq chips. They just blow a fuse in the chip that disables the second core.
Fortunately, it looks like they do update the device ID in the pssid register so I have updated this diff to check that register first.

jmg accepted this revision.May 20 2020, 12:32 AM

This booted on my 07S board w/o me having to set hw.ncpu in loader!

I assume you tested w/ your boards as well? Any other changes you want in?

sys/arm/xilinx/zy7_mp.c
2

Probably should update copyright year. I can do this when I commit.

This revision is now accepted and ready to land.May 20 2020, 12:32 AM
andrew added inline comments.May 20 2020, 7:22 AM
sys/arm/xilinx/zy7_mp.c
77

What are these magic numbers?

jmg requested changes to this revision.May 20 2020, 7:42 AM

Sorry, got a bit excited that things worked.

sys/arm/xilinx/zy7_mp.c
77

Yes, please make these into defines. Also, very useful to include the document name/number and section/table information for various defines/magic numbers. Example is that the TRM I have (UG585, v1.12.2) doesn't have these defined in them, so if they are defined in a different doc, it'd be nice to know.

Thanks.

This revision now requires changes to proceed.May 20 2020, 7:42 AM
skibo added inline comments.May 20 2020, 3:40 PM
sys/arm/xilinx/zy7_mp.c
77

I think I am going to put these defines in zy7_slcr.h and include it here. That also means doing some style and white-space clean-up to zy7_slcr.h while I'm at it. I'll put it up as soon as I've retested it.

skibo updated this revision to Diff 72036.May 20 2020, 5:39 PM

Add device id definitions to zy7_slcr.h and clean up style and white-spaces.

Harbormaster completed remote builds in B31203: Diff 72036.May 20 2020, 5:39 PM
jmg accepted this revision.May 21 2020, 6:33 AM

Tested and working.

Thanks.

This revision is now accepted and ready to land.May 21 2020, 6:33 AM
Closed by commit rS361326: Bring in support for single core Zynq devices. Turns out that real (authored by jmg). · Explain WhyMay 21 2020, 6:41 AM
This revision was automatically updated to reflect the committed changes.
jmg added a commit: rS361326: Bring in support for single core Zynq devices. Turns out that real.

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sys/arm/xilinx/zy7_mp.c

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