Page MenuHomeFreeBSD

Add Freescale QorIQ SATA controller support.
ClosedPublic

Authored by jhibbits on Apr 23 2016, 12:42 AM.
Tags
None
Referenced Files
Unknown Object (File)
Feb 3 2024, 2:28 AM
Unknown Object (File)
Feb 3 2024, 2:27 AM
Unknown Object (File)
Jan 18 2024, 8:02 PM
Unknown Object (File)
Dec 27 2023, 9:27 PM
Unknown Object (File)
Dec 20 2023, 12:24 AM
Unknown Object (File)
Nov 27 2023, 5:48 PM
Unknown Object (File)
Oct 25 2023, 9:35 AM
Unknown Object (File)
Sep 15 2023, 1:59 AM
Subscribers
None

Details

Summary

The Freescale SATA controller is almost-but-not-quite AHCI. This is a
heavily modified AHCI driver. This driver still has some rough edges, which I'm
seeking assistance/review for, to clean it up both in terms of
removing/refactoring and improving error handling.

What I would like to do in the not-too-distant future is to extract the more or
less common portions of SATA drivers into a separate file/library, with
callbacks into the driver-specific routines. For example, most drivers support
FIS-based switching, but all implement their own. There is a SATA one in
dev/ata/ata-sata.c, but it works with the single-request-issue generic ATA
driver. Also, the timeouts can be merged to use callbacks, and the channel
structure can be mostly unified into a base structure with drivers 'subclassing'
it.

Test Plan

Boot system with P5020 (or P1022 I know of), with SATA drive attached
to this controller. Perform basic dd operations (dd if=/dev/ada0 of=/dev/null
bs=1M count=64). Partition the disk and reboot.

Diff Detail

Repository
rS FreeBSD src repository - subversion
Lint
Lint Passed
Unit
No Test Coverage
Build Status
Buildable 11635
Build 11981: arc lint + arc unit

Event Timeline

jhibbits retitled this revision from to Add Freescale QorIQ SATA controller support..
jhibbits updated this object.
jhibbits edited the test plan for this revision. (Show Details)
jhibbits added reviewers: PowerPC, mav, imp.

Update copyrights. I'm very lazy/absentminded with this, probably on more files
than these that I've committed.

Improve reset stability. There appears to be a case where an interrupt is
received after the fsl_sata_end_transaction() is called from the polling loop on
resets. Insert a kludge to ignore already processed slots (ccb == NULL), so
this doesn't panic.

There has to be a better way of doing this, but all other ways I've tried cause
other strange problems to occur, mostly stalls at odd times.

Checkpoint. Improve stability. Still barely hits SATA1 speeds, so need some
feedback on what might be hampering things. Additionally, I've disabled port
multiplier support for now, as CAM for some reason tries to reset port 15, which
it balks at by timing out on a nonexistent device if there really is no port
multiplier.

This revision was automatically updated to reflect the committed changes.