A single page invalidation sets addr2 == 0. In the original code, it
falsely flush the whole address in non global pmap. However, the
kernel pmap are all PG_G, which means a single page TLB flush will always be
staled and thus become invalid. As a result, we set parameter based on
their op in a new helper function instead of relying on args. This
affects only on AMD platform as Intel has their PTI implementation.

PR: 291577
MFC after: 2 weeks