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mips: Save off the BSP HWREna register to share with APs
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Authored by jhibbits on Dec 12 2024, 7:00 PM.
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Details

Reviewers
adrian
Group Reviewers
MIPS
Summary

Without sharing the HWREna register it may default to something
undesirable on APs, leading to either reserved instruction exceptions or
emulated access, as in the UserLocal register (TCB pointer).

Sponsored by: Juniper Networks, Inc.

Diff Detail

Repository
rS FreeBSD src repository - subversion
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Build Status
Buildable 61123
Build 58007: arc lint + arc unit

Event Timeline

nice catch! please land on stable/13 and stable/12! tyvm!

This revision is now accepted and ready to land.Dec 12 2024, 7:04 PM
jrtc27 added inline comments.
sys/mips/mips/mp_machdep.c
63

This is already in cpuinfo

sys/mips/mips/mp_machdep.c
301

With #include <machine/cpuinfo.h>