Paths

Table of Contentst

-
sys/
-
kern/
-
kern_clock.c
-
kern_clocksource.c
-
kern_sig.c
5/6
kern_synch.c
-
kern_tc.c
-
kern_thr.c
-
kern_thrworkq.c
-
kern_time.c
-
kern_timeout.c
-
kern_umtx.c
-
subr_param.c
-
tty_ttydisc.c
-
uipc_mqueue.c
-
uipc_sem.c
-
vfs_aio.c
-
sys/
-
callout.h
-
kernel.h
-
time.h

Differential D4292

decouple maximum clock frequency from callout scheduling granularity
AbandonedPublic
Actions

Authored by kmacy on Nov 27 2015, 12:28 AM.

Details

Reviewers

davide

Summary

Motivated by the need to schedule retransmits at a granularity less than 1ms while not swamping the CPU with excess timer interrupts.

change ticks to long
add a separate hardclock frequency: kern.hardclock_hz
make callout precision behave sensibly, where value passed is 0 or less than SBT_1US it gets replaced with sbt corresponding to hardclock_hz (SBT_1MS by default)
add tvtohz64
replace calls likely to wrap at higher frequency with tvtohz64

Diff Detail

Repository

rS FreeBSD src repository - subversion

Lint

Lint Skipped

Unit

Tests Skipped

Event Timeline

kmacy updated this revision to Diff 10533.Nov 27 2015, 12:28 AM

kmacy retitled this revision from to decouple maximum clock frequency from callout scheduling granularity.

kmacy updated this object.

kmacy edited the test plan for this revision. (Show Details)

kmacy added a reviewer: davide.

kmacy set the repository for this revision to rS FreeBSD src repository - subversion.

Herald added a subscriber: imp. · View Herald TranscriptNov 27 2015, 12:28 AM

kmacy added a project: transport.Nov 27 2015, 12:42 AM

kmacy added a subscriber: benno.

The changes look good. I'd split them in multiple patches/commit, more or less following the structure you outlined in the summary, but thanks for sending out a single one so we can have the whole picture.
IIRC there were objections to change ticks from 32-bits to 64-bits so you may want to ask feedback from a more general audience.
Other than that, I'm fine with (a splitted version of this) getting in.

sys/kern/kern_clock.c
472	Atomic on 64-bit integers are slightly more expensive than the 32-bit counterparts. I think it's fine, but do we have numbers on what's the impact of this? (maybe profiling).
sys/kern/kern_tc.c
1285	I may miss something here, but do you ever use the value of the counter you just read?
sys/kern/kern_timeout.c
597	Please add a comment specifying why you round-up, for clarity.
957	Can this be KASSERT() maybe with a message attached "precision needs to be at least 1US"? I'm not fussed about it, so if you don't like it you can leave it as is.
sys/kern/subr_param.c
88	I think you ate a whitespace two lines below.
116	Nit: SYSCTL descriptions always start with capital letters, can you change that?
sys/sys/callout.h
61	Nit again, this seems unaligned.

kmacy abandoned this revision.May 3 2018, 6:12 PM

Revision Contents
Changeset List

Path

Size

sys/

kern/

76 lines

5 lines

5 lines

6 lines

16 lines

4 lines

8 lines

6 lines

12 lines

9 lines

17 lines

5 lines

12 lines

2 lines

10 lines

sys/

callout.h

38 lines

kernel.h

5 lines

time.h

3 lines

Diff 10533

View Options

sys/kern/kern_clock.c

Context not available.
	*/	*/
	arm_smccc_1_0 hvc	arm_smccc_1_0 hvc
	arm_smccc_1_0 smc	arm_smccc_1_0 smc
		/* arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args,
		struct arm_smccc_1_2_regs res) /
		andrewUnsubmitted Done Inline Actions You can remove this comment & replace it with a newline to seperate the above from the 1.2 macro. andrew: You can remove this comment & replace it with a newline to seperate the above from the 1.2…
		.macro arm_smccc_1_2 insn
		ENTRY(arm_smccc_1_2_\insn)
		stp x1, x19, [sp, #-16]!
		mov x19, x0
		ldp x0, x1, [x19, #16 * 0]
		ldp x2, x3, [x19, #16 * 1]
		ldp x4, x5, [x19, #16 * 2]
		ldp x6, x7, [x19, #16 * 3]
		ldp x8, x9, [x19, #16 * 4]
		andrewUnsubmitted Done Inline Actions Can you rebase this past R10:48a7e53db78293ba2723cecfb3a3d5d23ea8e44d & update to be a macro so we can also add `smc` support. andrew: Can you rebase this past R10:48a7e53db78293ba2723cecfb3a3d5d23ea8e44d & update to be a macro so…
		ldp x10, x11, [x19, #16 * 5]
		ldp x12, x13, [x19, #16 * 6]
		ldp x14, x15, [x19, #16 * 7]
		ldp x16, x17, [x19, #16 * 8]
		hvc #0
		andrewUnsubmitted Done Inline Actions `\insn #0` andrew: `\insn #0`
		ldr x19, [sp]
		cbz x19, 1f
		stp x0, x1, [x19, #16 * 0]
		stp x2, x3, [x19, #16 * 1]
		lwhsuUnsubmitted Done Inline Actions Why two spaces between `,` and `[`? for those 3 lines? lwhsu: Why two spaces between `,` and `[`? for those 3 lines?
		stp x4, x5, [x19, #16 * 2]
		stp x6, x7, [x19, #16 * 3]
		stp x8, x9, [x19, #16 * 4]
		stp x10, x11, [x19, #16 * 5]
		stp x12, x13, [x19, #16 * 6]
		stp x14, x15, [x19, #16 * 7]
		stp x16, x17, [x19, #16 * 8]
		ldp xzr, x19, [sp], #16
		1: ret
		END(arm_smccc_1_2\insn)
		.endm
		/* int arm_smccc_1_2_(const struct arm_smccc_1_2_regs args,
		lwhsuUnsubmitted Done Inline Actions Also those 3 lines. lwhsu: Also those 3 lines.
		lwhsuUnsubmitted Not Done Inline Actions Small nit: trailing white space. lwhsu: Small nit: trailing white space.
		* struct arm_smccc_1_2_regs *res)
		*/
		arm_smccc_1_2 hvc
		arm_smccc_1_2 smc
Context not available.

View Options

sys/kern/kern_clocksource.c

Context not available.
	*/	*/
	arm_smccc_1_0 hvc	arm_smccc_1_0 hvc
	arm_smccc_1_0 smc	arm_smccc_1_0 smc
		/* arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args,
		struct arm_smccc_1_2_regs res) /
		andrewUnsubmitted Done Inline Actions You can remove this comment & replace it with a newline to seperate the above from the 1.2 macro. andrew: You can remove this comment & replace it with a newline to seperate the above from the 1.2…
		.macro arm_smccc_1_2 insn
		ENTRY(arm_smccc_1_2_\insn)
		stp x1, x19, [sp, #-16]!
		mov x19, x0
		ldp x0, x1, [x19, #16 * 0]
		ldp x2, x3, [x19, #16 * 1]
		ldp x4, x5, [x19, #16 * 2]
		ldp x6, x7, [x19, #16 * 3]
		ldp x8, x9, [x19, #16 * 4]
		andrewUnsubmitted Done Inline Actions Can you rebase this past R10:48a7e53db78293ba2723cecfb3a3d5d23ea8e44d & update to be a macro so we can also add `smc` support. andrew: Can you rebase this past R10:48a7e53db78293ba2723cecfb3a3d5d23ea8e44d & update to be a macro so…
		ldp x10, x11, [x19, #16 * 5]
		ldp x12, x13, [x19, #16 * 6]
		ldp x14, x15, [x19, #16 * 7]
		ldp x16, x17, [x19, #16 * 8]
		hvc #0
		andrewUnsubmitted Done Inline Actions `\insn #0` andrew: `\insn #0`
		ldr x19, [sp]
		cbz x19, 1f
		stp x0, x1, [x19, #16 * 0]
		stp x2, x3, [x19, #16 * 1]
		lwhsuUnsubmitted Done Inline Actions Why two spaces between `,` and `[`? for those 3 lines? lwhsu: Why two spaces between `,` and `[`? for those 3 lines?
		stp x4, x5, [x19, #16 * 2]
		stp x6, x7, [x19, #16 * 3]
		stp x8, x9, [x19, #16 * 4]
		stp x10, x11, [x19, #16 * 5]
		stp x12, x13, [x19, #16 * 6]
		stp x14, x15, [x19, #16 * 7]
		stp x16, x17, [x19, #16 * 8]
		ldp xzr, x19, [sp], #16
		1: ret
		END(arm_smccc_1_2\insn)
		.endm
		/* int arm_smccc_1_2_(const struct arm_smccc_1_2_regs args,
		lwhsuUnsubmitted Done Inline Actions Also those 3 lines. lwhsu: Also those 3 lines.
		lwhsuUnsubmitted Not Done Inline Actions Small nit: trailing white space. lwhsu: Small nit: trailing white space.
		* struct arm_smccc_1_2_regs *res)
		*/
		arm_smccc_1_2 hvc
		arm_smccc_1_2 smc
Context not available.

View Options

sys/kern/kern_sig.c

Context not available.
	*/	*/
	arm_smccc_1_0 hvc	arm_smccc_1_0 hvc
	arm_smccc_1_0 smc	arm_smccc_1_0 smc
		/* arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args,
		struct arm_smccc_1_2_regs res) /
		andrewUnsubmitted Done Inline Actions You can remove this comment & replace it with a newline to seperate the above from the 1.2 macro. andrew: You can remove this comment & replace it with a newline to seperate the above from the 1.2…
		.macro arm_smccc_1_2 insn
		ENTRY(arm_smccc_1_2_\insn)
		stp x1, x19, [sp, #-16]!
		mov x19, x0
		ldp x0, x1, [x19, #16 * 0]
		ldp x2, x3, [x19, #16 * 1]
		ldp x4, x5, [x19, #16 * 2]
		ldp x6, x7, [x19, #16 * 3]
		ldp x8, x9, [x19, #16 * 4]
		andrewUnsubmitted Done Inline Actions Can you rebase this past R10:48a7e53db78293ba2723cecfb3a3d5d23ea8e44d & update to be a macro so we can also add `smc` support. andrew: Can you rebase this past R10:48a7e53db78293ba2723cecfb3a3d5d23ea8e44d & update to be a macro so…
		ldp x10, x11, [x19, #16 * 5]
		ldp x12, x13, [x19, #16 * 6]
		ldp x14, x15, [x19, #16 * 7]
		ldp x16, x17, [x19, #16 * 8]
		hvc #0
		andrewUnsubmitted Done Inline Actions `\insn #0` andrew: `\insn #0`
		ldr x19, [sp]
		cbz x19, 1f
		stp x0, x1, [x19, #16 * 0]
		stp x2, x3, [x19, #16 * 1]
		lwhsuUnsubmitted Done Inline Actions Why two spaces between `,` and `[`? for those 3 lines? lwhsu: Why two spaces between `,` and `[`? for those 3 lines?
		stp x4, x5, [x19, #16 * 2]
		stp x6, x7, [x19, #16 * 3]
		stp x8, x9, [x19, #16 * 4]
		stp x10, x11, [x19, #16 * 5]
		stp x12, x13, [x19, #16 * 6]
		stp x14, x15, [x19, #16 * 7]
		stp x16, x17, [x19, #16 * 8]
		ldp xzr, x19, [sp], #16
		1: ret
		END(arm_smccc_1_2\insn)
		.endm
		/* int arm_smccc_1_2_(const struct arm_smccc_1_2_regs args,
		lwhsuUnsubmitted Done Inline Actions Also those 3 lines. lwhsu: Also those 3 lines.
		lwhsuUnsubmitted Not Done Inline Actions Small nit: trailing white space. lwhsu: Small nit: trailing white space.
		* struct arm_smccc_1_2_regs *res)
		*/
		arm_smccc_1_2 hvc
		arm_smccc_1_2 smc
Context not available.

View Options

sys/kern/kern_synch.c

Context not available.
	*/	*/
	arm_smccc_1_0 hvc	arm_smccc_1_0 hvc
	arm_smccc_1_0 smc	arm_smccc_1_0 smc
		/* arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args,
		struct arm_smccc_1_2_regs res) /
		andrewUnsubmitted Done Inline Actions You can remove this comment & replace it with a newline to seperate the above from the 1.2 macro. andrew: You can remove this comment & replace it with a newline to seperate the above from the 1.2…
		.macro arm_smccc_1_2 insn
		ENTRY(arm_smccc_1_2_\insn)
		stp x1, x19, [sp, #-16]!
		mov x19, x0
		ldp x0, x1, [x19, #16 * 0]
		ldp x2, x3, [x19, #16 * 1]
		ldp x4, x5, [x19, #16 * 2]
		ldp x6, x7, [x19, #16 * 3]
		ldp x8, x9, [x19, #16 * 4]
		andrewUnsubmitted Done Inline Actions Can you rebase this past R10:48a7e53db78293ba2723cecfb3a3d5d23ea8e44d & update to be a macro so we can also add `smc` support. andrew: Can you rebase this past R10:48a7e53db78293ba2723cecfb3a3d5d23ea8e44d & update to be a macro so…
		ldp x10, x11, [x19, #16 * 5]
		ldp x12, x13, [x19, #16 * 6]
		ldp x14, x15, [x19, #16 * 7]
		ldp x16, x17, [x19, #16 * 8]
		hvc #0
		andrewUnsubmitted Done Inline Actions `\insn #0` andrew: `\insn #0`
		ldr x19, [sp]
		cbz x19, 1f
		stp x0, x1, [x19, #16 * 0]
		stp x2, x3, [x19, #16 * 1]
		lwhsuUnsubmitted Done Inline Actions Why two spaces between `,` and `[`? for those 3 lines? lwhsu: Why two spaces between `,` and `[`? for those 3 lines?
		stp x4, x5, [x19, #16 * 2]
		stp x6, x7, [x19, #16 * 3]
		stp x8, x9, [x19, #16 * 4]
		stp x10, x11, [x19, #16 * 5]
		stp x12, x13, [x19, #16 * 6]
		stp x14, x15, [x19, #16 * 7]
		stp x16, x17, [x19, #16 * 8]
		ldp xzr, x19, [sp], #16
		1: ret
		END(arm_smccc_1_2\insn)
		.endm
		/* int arm_smccc_1_2_(const struct arm_smccc_1_2_regs args,
		lwhsuUnsubmitted Done Inline Actions Also those 3 lines. lwhsu: Also those 3 lines.
		lwhsuUnsubmitted Not Done Inline Actions Small nit: trailing white space. lwhsu: Small nit: trailing white space.
		* struct arm_smccc_1_2_regs *res)
		*/
		arm_smccc_1_2 hvc
		arm_smccc_1_2 smc
Context not available.