Fix MSI IRQ allocation for ARM GIC
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Authored by gonzo on Jan 11 2017, 7:48 PM.

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andrew

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rS329280: MFC r320387:
rS320387: [arm] Use correct index value when checking range validity

Summary

Code used wrong vartiable to check flags, irq does not change so only first IRQ is checked

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rS FreeBSD src repository - subversion

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gonzo updated this revision to Diff 23899.Jan 11 2017, 7:48 PM

gonzo retitled this revision from to Fix MSI IRQ allocation for ARM GIC.

gonzo updated this object.

gonzo edited the test plan for this revision. (Show Details)

gonzo added a reviewer: andrew.

Herald added a subscriber: imp. · View Herald TranscriptJan 11 2017, 7:48 PM

andrew added inline comments.Apr 20 2017, 2:34 PM

sys/arm/arm/gic.c
1442–1443 ↗	(On Diff #23899)	I think this assert will be hit when the allocation doesn't fit as `sc->sc_spi_end` isn't a MSI/MSI-X irq.

Overcome by events: fixed by r317428

Are the irq -> end_irq changes still relevant? They appear so.

Yeah, overlooked end_irq part, reopening

Sync patch to the latest HEAD version

Harbormaster completed remote builds in B9028: Diff 27938.May 2 2017, 6:42 PM

Harbormaster completed remote builds in B9028: Diff 27938.May 2 2017, 7:25 PM

ping

andrew accepted this revision.Jun 22 2017, 3:55 PM

This revision is now accepted and ready to land.Jun 22 2017, 3:55 PM

Closed by commit rS320387: [arm] Use correct index value when checking range validity (authored by gonzo). · Explain WhyJun 26 2017, 9:45 PM

This revision was automatically updated to reflect the committed changes.

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arm/

gic.c

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Fix MSI IRQ allocation for ARM GICClosedPublicActions