This adds bhnd(4) bus-level support for querying backplane interrupt vector
routing, and delegating machine/bridge-specific interrupt handling to the
concrete bhnd(4) driver implementation.
This delta provides initial support for interrupt assignment on newer bhndb(4)
bridged PCI devices, where we provide the PCI/MSI interrupt directly to
attached cores.
On PCI(e) devices, we do not currently enable pci<->backplane interrupt routing.
I'll be implementing the required bhndb_pci and siba_bhndb additions in
an upcoming diff.
On MIPS devices, we report a backplane interrupt count of 0, effectively
disabling bus-level interrupt assignment and allowing existing devices to
continue operating as they have been. Implementing MIPS support is mainly
blocking on INTRNG non-FDT regressions.
Changes:
- Modified bhndb's resource bridging behavior to delegate child resource requests directly to the bridge's parent device bus if the requested resource type (e.g. SYS_RES_IRQ) isn't handled locally.
- Added bhnd(4) bus-level methods for querying backplane-specific interrupt vector (ivec) assignments, and requesting assignment of interrupt resources to bhnd(4) children.
- Extended bcma(4) and siba(4) child enumeration, querying ivecs and registering associated SYS_RES_IRQ resources.
- IRQ resources are now reported in BUS_PROBE_NOMATCH output.
- Implemented basic bhnd(4)-compatible MSI interrupt configuration in bhndb_pci.
Depends on D7768