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Differential D7587

Bug 212020 - Add powerd(8) support for newer AMD CPUs
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Authored by Scoobi_doo_yahoo.com on Aug 21 2016, 1:11 AM.
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cperciva
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rS308005: Add powerd(8) support for several families of AMD CPUs.
Summary

From Bug 212020:

sys/x86/cpufreq/hwpstate.c provides support for AMD CPUs, but only
supports families up to 0x11. The latest AMD CPU family is 0x16. This
patch adds support for newer AMD CPUs. (The patch to
sys/x86/cpufreq/powernow.c is cosmetic/superfluous.)

Test Plan
  1. Boot kernel containing patch.
  2. Try to start powerd(8).

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rS FreeBSD src repository - subversion
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Scoobi_doo_yahoo.com updated this revision to Diff 19518.Aug 21 2016, 1:11 AM
Scoobi_doo_yahoo.com retitled this revision from to Bug 212020 - Add powerd(8) support for newer AMD CPUs.
Scoobi_doo_yahoo.com updated this object.
Scoobi_doo_yahoo.com edited the test plan for this revision. (Show Details)
Scoobi_doo_yahoo.com set the repository for this revision to rS FreeBSD src repository - subversion.
Herald added subscribers: Contributor Reviews (src), imp. · View Herald TranscriptAug 21 2016, 1:11 AM
allanjude added a reviewer: cperciva.Aug 26 2016, 2:34 PM
allanjude added a subscriber: allanjude.
jhb added a subscriber: jhb.Oct 19 2016, 6:32 AM
jhb added inline comments.
sys/x86/cpufreq/hwpstate.c
411 ↗(On Diff #19518)

This change seems to be a no-op? Shouldn't both conditions be equivalent?

424 ↗(On Diff #19518)

Is there a manual/datasheet that documents how to interpret the MSR fields for these different families? It seems really odd for only family 0x11 to use the 0x08 offset.

sys/x86/cpufreq/powernow.c
869 ↗(On Diff #19518)

The changes in this file all seem to be debugging?

Scoobi_doo_yahoo.com added inline comments.Oct 19 2016, 3:34 PM
sys/x86/cpufreq/hwpstate.c
411 ↗(On Diff #19518)

Yes, these are equivalent expressions; I think mine's easier to read.

424 ↗(On Diff #19518)

MainPllOpFreqIdMax: main PLL operating frequency ID maximum. Read-only. Specifies the
maximum main PLL operating frequency supported by the processor. The maximum frequency is 100
MHz * (MainPllOpFreqIdMax + 08h), if MainPllOpFreqIdMax is greater than zero; if
MainPllOpFreqIdMax = 00h, then there is no frequency limit. See F3xD4[MainPllOpFreqId].

sys/x86/cpufreq/powernow.c
869 ↗(On Diff #19518)

True, they're cosmetic/debugging/not-functional.

jhb added inline comments.Oct 22 2016, 12:13 AM
sys/x86/cpufreq/hwpstate.c
424 ↗(On Diff #19518)

This looks to be correct for 0x12, but the 0x14 manuals do not have a CpuFID in this MSR. Instead, the frequency has to be calculated using a different formula (see page 430 in the Family 14h manual). You have to read from an associated PCI device to determine a "package" frequency and use the values from the MSR as a divisor of the package frequency. However, CpuFID is present in this MSR on 0x15 and 0x16 family CPUs and the frequency is calculated the same as for family 0x10. Given that, I think we should drop 0x14 from this patch unless you have tested this on family 0x14 processors?

Closed by commit rS308005: Add powerd(8) support for several families of AMD CPUs. (authored by jhb). · Explain WhyOct 27 2016, 9:32 PM
This revision was automatically updated to reflect the committed changes.

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head/
sys/
x86/
cpufreq/
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Diff 21741

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head/sys/x86/cpufreq/hwpstate.c

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