Enable 4-byte address support for the mx25l family of SPI flash devices.
Introduce 2 new flags:
- FL_ENABLE_4B_ADDR (forces the use of 4-byte addresses)
- FL_DISABLE_4B_ADDR (forces the use of 3-byte addresses)
If an SPI flash chip is defined with FL_ENABLE_4B_ADDR in its flags, then an 'Enter 4-byte mode' command is sent to the chip at attach time and, later, all commands that require addressing are issued with 4-byte addresses.
If an SPI flash chip is defined with FL_DISABLE_4B_ADDR in its flags, then an 'Exit 4-byte mode' command is sent to the chip at attach time and, later, all commands that require addressing are issued with 3-byte addresses.
For chips that do not have any of these flags defined the behaviour is unchanged.
This review also adds support for the MX25L25735F and MX25L25635E chips (vendor id 0xc2, device id 0x2019), which support 4-byte mode and enables 4-byte mode for them. These are 256Mbit devices (32MiB) and, as such, can only be fully addressed by using 4-byte addresses.
MX25L25735F datasheet can be found at:
http://datasheet.octopart.com/MX25L25735FZ2I-10G-Macronix-datasheet-15721676.pdf