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Enable 4-byte address support for mx25l
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Authored by sgalabov on Apr 1 2016, 12:51 PM.
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Details

Summary

Enable 4-byte address support for the mx25l family of SPI flash devices.
Introduce 2 new flags:

  • FL_ENABLE_4B_ADDR (forces the use of 4-byte addresses)
  • FL_DISABLE_4B_ADDR (forces the use of 3-byte addresses)

If an SPI flash chip is defined with FL_ENABLE_4B_ADDR in its flags, then an 'Enter 4-byte mode' command is sent to the chip at attach time and, later, all commands that require addressing are issued with 4-byte addresses.
If an SPI flash chip is defined with FL_DISABLE_4B_ADDR in its flags, then an 'Exit 4-byte mode' command is sent to the chip at attach time and, later, all commands that require addressing are issued with 3-byte addresses.
For chips that do not have any of these flags defined the behaviour is unchanged.

This review also adds support for the MX25L25735F and MX25L25635E chips (vendor id 0xc2, device id 0x2019), which support 4-byte mode and enables 4-byte mode for them. These are 256Mbit devices (32MiB) and, as such, can only be fully addressed by using 4-byte addresses.

MX25L25735F datasheet can be found at:
http://datasheet.octopart.com/MX25L25735FZ2I-10G-Macronix-datasheet-15721676.pdf

Test Plan

Tested on MT7688 (LinkIt Smart 7688 - http://www.seeedstudio.com/depot/LinkIt-Smart-7688-p-2573.html), which has the MX24L25735F SPI flash.

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sgalabov retitled this revision from to Enable 4-byte address support for mx25l.
sgalabov updated this object.
sgalabov edited the test plan for this revision. (Show Details)
sgalabov added reviewers: imp, gonzo, adrian.
sgalabov set the repository for this revision to rS FreeBSD src repository - subversion.
adrian edited edge metadata.

looks good to me! go for it!

Thanks!

This revision is now accepted and ready to land.Apr 1 2016, 2:50 PM
This revision was automatically updated to reflect the committed changes.