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Use 4-level pagetables early in ARM64 locore.S

Authored by on Sep 29 2015, 5:04 AM.


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This commit is a temporary enabler for ThunderX Dual-Socket system. To be reverted once full 4-level pagetables are implemented.

When MMU is being enabled, the executed code must be mapped directly. If the UEFI loads kernel above the first 2^39 bytes, we're running out of VM addresses. This patch creates 4-level pagetable structure (with 16 L1 pages, thus supports up to 2^43 bytes of physical address space). Once MMU is enabled, locore drops back to 3-level to be in-sync with what initarm requires.

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Event Timeline retitled this revision from to Use 4-level pagetables early in ARM64 locore.S. updated this object. edited the test plan for this revision. (Show Details) added a reviewer: arm64. set the repository for this revision to rS FreeBSD src repository.
andrew accepted this revision.Oct 19 2015, 1:24 PM
andrew added a reviewer: andrew.

This should be handled in rS289581, it was a merge of this and the locore.S bits of D3885.

This revision is now accepted and ready to land.Oct 19 2015, 1:24 PM
andrew closed this revision.Oct 19 2015, 1:24 PM