Differential D31693
pcib(4): write window after resource adjustment Authored by mav on Aug 26 2021, 5:20 PM. Tags Referenced Files
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Details When adjusting resources we should write updated window base/limit into the registers. Without this newly added address range won't be routed through the bridge properly. While there, make sure grown window remain aligned to the set granularity. It does not cause problems now, since adjust is mostly called by other PCI bridges, having the same alignment requirements, but I think it is right to have it in general case. Without the patch topology with 3 layers of bridges allocating resources from scratch shows proper memory windows in devinfo -vr, but only the originally allocated base/limit in lspci -v for the bridge closest to the root. The patch fixes it, fixing access to the memory of NVMe SSDs connected to the last layer.
Diff Detail
Event TimelineComment Actions Given pcib_grow_window also rounds requests it seems sensible to be consistent and do so here too. Not writing the updated window is indeed a silly oversight and explains why clear_pcib wasn't working for me on my board, stopping enumeration early. But best wait for John to check there isn't something I'm overlooking here. Comment Actions Thinking about it again, pcib_expand_window() should receive not the requested start/end values, but MIN()/MAX() respectively from them and the current window base/limit. Otherwise in case of multiple resources pcib_expand_window() panic on attempt to shrink the window on another side of where it growth. Unfortunately I don't have hardware configuration with more than one second level bridge connected to the one closest to the root to illustrate that. Comment Actions Yep that's another good observation... any more bugs you can think of with my original code? :) |